Ioannis Seitanidis

发表

Hardware primitives for the synthesis of multithreaded elastic systems

Giorgos Dimitrakopoulos, Ioannis Seitanidis, Anastasios Psarras, 2014, 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE).

ElastiStore: Flexible Elastic Buffering for Virtual-Channel-Based Networks on Chip

Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos, Ioannis Seitanidis, 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Introduction to Network-on-Chip Design

Giorgos Dimitrakopoulos, Ioannis Seitanidis, Anastasios Psarras, 2015 .

Virtual-Channel Flow Control and Buffering

Giorgos Dimitrakopoulos, Ioannis Seitanidis, Anastasios Psarras, 2015 .

ElastiNoC: A self-testable distributed VC-based Network-on-Chip architecture

Emmanouil Kalligeros, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos, 2014, 2014 Eighth IEEE/ACM International Symposium on Networks-on-Chip (NoCS).

Baseline Virtual-Channel Based Switching Modules and Routers

Giorgos Dimitrakopoulos, Ioannis Seitanidis, Anastasios Psarras, 2015 .

Timing-Driven and Placement-Aware Multibit Register Composition

Giorgos Dimitrakopoulos, Ioannis Seitanidis, Pavlos M. Mattheakis, 2019, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

ElastiStore: An elastic buffer architecture for Network-on-Chip routers

Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos, Ioannis Seitanidis, 2014, 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Pipelined Virtual-Channel-Based Routers

Giorgos Dimitrakopoulos, Ioannis Seitanidis, Anastasios Psarras, 2015 .

Powermax: an automated methodology for generating peak-power traffic in networks-on-chip

Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos, Ioannis Seitanidis, 2016, 2016 Tenth IEEE/ACM International Symposium on Networks-on-Chip (NOCS).

ShortPath: A Network-on-Chip Router with Fine-Grained Pipeline Bypassing

Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos, Ioannis Seitanidis, 2016, IEEE Transactions on Computers.

Microarchitecture of Network-on-Chip Routers

Giorgos Dimitrakopoulos, Ioannis Seitanidis, Anastasios Psarras, 2015 .

High-Speed Allocators for VC-Based Routers

Giorgos Dimitrakopoulos, Ioannis Seitanidis, Anastasios Psarras, 2015 .

PhaseNoC: Versatile Network Traffic Isolation Through TDM-Scheduled Virtual Channels

Junghee Lee, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos, 2016, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Automatic Generation of Peak-Power Traffic for Networks-on-Chip

Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos, Ioannis Seitanidis, 2019, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Link-Level Flow Control and Buffering

Giorgos Dimitrakopoulos, Ioannis Seitanidis, Anastasios Psarras, 2015 .

Microarchitecture of Network-on-Chip Routers: A Designer's Perspective

Giorgos Dimitrakopoulos, Ioannis Seitanidis, Anastasios Psarras, 2014 .

ElastiNoC: A Self-Testable Distributed

Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos, Ioannis Seitanidis, 2014 .

Timing driven incremental multi-bit register composition using a placement-aware ILP formulation

David G. Chinnery, Giorgos Dimitrakopoulos, Ioannis Seitanidis, 2017, 2017 54th ACM/EDAC/IEEE Design Automation Conference (DAC).

Pipelined Wormhole Routers

Giorgos Dimitrakopoulos, Ioannis Seitanidis, Anastasios Psarras, 2015 .

Timing-Driven Placement Optimization Facilitated by Timing-Compatibility Flip-Flop Clustering

Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos, Ioannis Seitanidis, 2020, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Baseline Switching Modules and Routers

Giorgos Dimitrakopoulos, Ioannis Seitanidis, Anastasios Psarras, 2015 .

PhaseNoC: TDM scheduling at the virtual-channel level for efficient network traffic isolation

Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos, Ioannis Seitanidis, 2015, 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE).