P. Marchal

发表

Design of Test Structures for the Characterization of Thermal–Mechanical Stress in 3D-Stacked IC

A. Mercha, G. Van der Plas, D. Perry, 2012, IEEE Transactions on Semiconductor Manufacturing.

Litho variations and their impact on the electrical yield of a 32nm node 6TSRAM cell design for manufacturability through design-proces integration II

Geert Vandenberghe, Wim Dehaene, Staf Verhaegen, 2008 .

Run-Time Software Multithreading

Francky Catthoor, Chun Wong, Stefaan Himpe, 2007 .

Scenario-based SDRAM-Energy-Aware Scheduling for Dynamic Multi-Media Applications on Multi-Processor Platforms.

Luca Benini, Henk Corporaal, Manuel Prieto, 2002 .

3D IO interface design between memory and logic dies on TSV interconnects

Wim Dehaene, Pol Marchal, Marco Facchini, 2009, HPCA 2009.

System Model and Work Flow

Francky Catthoor, Chun Wong, Stefaan Himpe, 2007 .

Large impact of task-level concurrency transformations on the MPEG4 IM1 player for weakly parallel processor platforms

Rudy Lauwereins, Hugo De Man, Diederik Verkest, 2000 .

Power aware data and memory management for dynamic applications

Francky Catthoor, David Atienza, Stylianos Mamagkakis, 2005 .

Comprehensive analysis of the impact of single and arrays of through silicon vias induced stress on high-k / metal gate CMOS performance

P. Soussan, E. Beyne, A. Mercha, 2010, 2010 International Electron Devices Meeting.

A designers perspective on future memory architectures for software defined radios

Bruno Bougard, Francky Catthoor, Antonis Papanikolaou, 2007 .