X. Mou

Bilayer Pseudospin Junction Transistor (BiSJT) for “Beyond-CMOS” Logic

L. Register, S. Banerjee, A. MacDonald, 2017, IEEE Transactions on Electron Devices.

Quantum transport simulations on the feasibility of the bilayer pseudospin field effect transistor (BiSFET)

L. Register, S. Banerjee, X. Mou, 2013, 2013 IEEE International Electron Devices Meeting.

Quantum transport simulation of Bilayer pseudoSpin Field-Effect Transistor (BiSFET) with tight-binding hartree-fock model

L. Register, S. Banerjee, X. Mou, 2013, International Conference on Simulation of Semiconductor Processes and Devices.

Interlayer tunnel field-effect transistor (ITFET): physics, fabrication and applications

S. Banerjee, X. Wu, A. Valsaraj, 2017 .

Ultralow-Power Pseudospintronic Devices via Exciton Condensation in Coupled Two-Dimensional Material Systems

L. Register, S. Banerjee, X. Mou, 2015 .

Effects of Electrode Layer Band Structure on the Performance of Multilayer Graphene-hBN-Graphene Interlayer Tunnel Field Effect Transistors.

S. Banerjee, Kenji Watanabe, T. Taniguchi, 2016, Nano letters.

Multi-barrier inter-layer tunnel field-effect transistor

L. Register, S. Banerjee, N. Prasad, 2016, 2016 IEEE International Electron Devices Meeting (IEDM).

Full-band simulations of single-particle resonant tunneling in transition metal dichalcogenide-based interlayer tunneling field-effect transistors

L. Register, S. Banerjee, X. Mou, 2016, 2016 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD).

Quantum transport simulation of exciton condensate transport physics in a double-layer graphene system

L. Register, S. Banerjee, X. Mou, 2015, 1509.02964.

Interplay among Bilayer pseudoSpin field-effect transistor (BiSFET) performance, BiSFET scaling and condensate strength

L. Register, S. Banerjee, X. Mou, 2014, 2014 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD).

Effects of Electrode Layer Band Structure on the Performance of Multilayer Graphene-hBN-Graphene Interlayer Tunnel Field Effect Transistors.

S. Banerjee, T. Taniguchi, L. F. Register, 2016, Nano letters.