Shiguo Liu

Design and Optimization of Bump Structures of Large Die Fine Pitch Copper/Low-k FCBGA and Copper Post Interconnections

Xiaowu Zhang, T. Chai, K. Biswas, 2008, 2008 10th Electronics Packaging Technology Conference.

Effects of detailed substrate modeling and solder layout design on the 1st and 2nd level solder joint reliability for the large die FCBGA

Xiaowu Zhang, T. Chai, K. Biswas, 2008, EuroSimE 2008 - International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Micro-Systems.

The 1st Level & 2nd Level Solder Joint Reliability Co-design for Larger Die Flip Chip Package

Xiaowu Zhang, T. Chai, K. Biswas, 2007, 2007 9th Electronics Packaging Technology Conference.

Development of through silicon via (TSV) interposer technology for large die (21×21mm) fine-pitch Cu/low-k FCBGA package

John H. Lau, V. Kripesh, Shiguo Liu, 2009, 2009 59th Electronic Components and Technology Conference.

Demonstration of high quality and low loss millimeter wave passives on embedded wafer level packaging platform (EMWLP)

John H. Lau, Teck Guan Lim, Ying Ying Lim, 2009, 2009 59th Electronic Components and Technology Conference.

Development of Large Die Fine-Pitch Cu/Low- $k$ FCBGA Package With Through Silicon via (TSV) Interposer

Tai Chong Chai, Shiguo Liu, Yue Ying Ong, 2011, IEEE Transactions on Components, Packaging and Manufacturing Technology.

High Quality and Low Loss Millimeter Wave Passives Demonstrated to 77-GHz for SiP Technologies Using Embedded Wafer-Level Packaging Platform (EMWLP)

Jinglin Shi, Teck Guan Lim, Ying Ying Lim, 2010, IEEE Transactions on Advanced Packaging.