Kiyoshi Oguri

发表

Modeling Topical Trends over Continuous Time with Priors

Atsuhiro Takasu, Tomonari Masada, Yuichiro Shibata, 2010, ISNN.

General-Purpose Computer Architecture Based on Fully Programmable Logic

Kiyoshi Oguri, Hideyuki Ito, Norbert Imlig, 1998, ICES.

An optimization method of DMA transfer for a general purpose reconfigurable machine

Yuichiro Shibata, Kiyoshi Oguri, Duncan A. Buell, 2008, 2008 International Conference on Field Programmable Logic and Applications.

A Memory Profiling Framework for Stencil Computation on an FPGA Accelerator with High Level Synthesis

Yuichiro Shibata, Kiyoshi Oguri, Keisuke Dohi, 2014, CARN.

A soft-core processor for finite field arithmetic with a variable word size accelerator

Yuichiro Shibata, Kiyoshi Oguri, Keisuke Dohi, 2014, 2014 24th International Conference on Field Programmable Logic and Applications (FPL).

An architecture of a specification design expert system

Kiyoshi Oguri, Yukihiro Nakamura, Mitsuteru Yukishita, 1992 .

Implementation of a GPU-Oriented Absorbing Boundary Condition for 3D-FDTD Electromagnetic Simulation

Yuichiro Shibata, Kiyoshi Oguri, Keisuke Dohi, 2012, IEICE Trans. Inf. Syst..

Implementation of the Extended Euclidean Algorithm for the Tate Pairing on FPGA

Yuichiro Shibata, Kiyoshi Oguri, Takehiro Ito, 2004, FPL.

IMPLEMENTATIONOFA BAROTROPICOPERATOR FOR OCEAN MODEL SIMULATION USINGA RECONFIGURABLE MACHINE

Yuichiro Shibata, Kiyoshi Oguri, Sayaka Shida, 2007 .

FPGA Implementation of Human Detection by HOG Features with AdaBoost

Yuichiro Shibata, Kiyoshi Oguri, Keisuke Dohi, 2013, IEICE Trans. Inf. Syst..

GPU implementation and optimization of electromagnetic simulation using the FDTD method for antenna designing

Yuichiro Shibata, Kiyoshi Oguri, Keisuke Dohi, 2011, CARN.

A novel multiple-walk parallel algorithm for the Barnes–Hut treecode on GPUs – towards cost effective, high performance N-body simulation

Tomonari Masada, Yuichiro Shibata, Kiyoshi Oguri, 2009, Computer Science - Research and Development.

An energy-efficient FPGA-based soft-core processor with a configurable word size ECC arithmetic accelerator

Yuichiro Shibata, Kiyoshi Oguri, Aiko Iwasaki, 2015, 2015 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS XVIII).

Semi-supervised Bibliographic Element Segmentation with Latent Permutations

Atsuhiro Takasu, Tomonari Masada, Yuichiro Shibata, 2011, ICADL.

Unsupervised Segmentation of Bibliographic Elements with Latent Permutations

Tomonari Masada, Yuichiro Shibata, Kiyoshi Oguri, 2010, WISE Workshops.

Performance modeling and optimization of 3-D stencil computation on a stream-based FPGA accelerator

Yuichiro Shibata, Kiyoshi Oguri, Keisuke Dohi, 2013, 2013 International Conference on Reconfigurable Computing and FPGAs (ReConFig).

FPGA implementation of a real-time super-resolution system using a convolutional neural network

Yuichiro Shibata, Kiyoshi Oguri, Taito Manabe, 2016, 2016 International Conference on Field-Programmable Technology (FPT).

Self-reorganising systems on VLSI circuits

Kiyoshi Oguri, Hideyuki Ito, Hiroshi Nakada, 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

Pipelined FPGA Implementation of a Wave-Front-Fetch Graph Cut System

Yuichiro Shibata, Kiyoshi Oguri, Ryo Kamasaka, 2019, CISIS.

Fixed-Point DSP Implementation of Low Bit-Rate Vocoder IMBE

Yuichiro Shibata, Kiyoshi Oguri, Hirokazu Sakamoto, 2005 .

Test Synthesis from Behavioral Description Based on Data Transfer Analysis

Kiyoshi Oguri, Tsukasa Kawaoka, Mitsuteru Yukishita, 1995, IEICE Trans. Inf. Syst..

FPGA implementation of a real-time super-resolution system with a CNN based on a residue number system

Yuichiro Shibata, Kiyoshi Oguri, Taito Manabe, 2017, 2017 International Conference on Field Programmable Technology (ICFPT).

Communicating logic: an alternative embedded stream processing paradigm

Kiyoshi Oguri, Hideyuki Ito, Hiroshi Nakada, 2000, ASP-DAC.

Dynamically reconfigurable logic LSI-PCA-1 : The first realization of the plastic cell architecture

Kiyoshi Oguri, Hideyuki Ito, Hiroshi Nakada, 2003 .

FPGA Implementation of a Video Based Abnormal Action Detection System with Real-Time Cubic Higher Order Local Auto-Correlation Analysis

Yuichiro Shibata, Kiyoshi Oguri, Keisuke Dohi, 2014, ARC.

Deep pipelined one-chip FPGA implementation of a real-time image-based human detection algorithm

Yuichiro Shibata, Kiyoshi Oguri, Keisuke Dohi, 2011, 2011 International Conference on Field-Programmable Technology.

FPGA Implementation of a Real-Time Super-Resolution System Using Flips and an RNS-Based CNN

Yuichiro Shibata, Kiyoshi Oguri, Taito Manabe, 2018, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

Efficient scheduling of rate law functions for ODE-based multimodel biochemical simulation on an FPGA

Hiroaki Kitano, Yuichiro Shibata, Kiyoshi Oguri, 2005, International Conference on Field Programmable Logic and Applications, 2005..

A Comparison of Machine Learning Classifiers for FPGA Implementation of HOG-Based Human Detection

Yuichiro Shibata, Kiyoshi Oguri, Ryo Fujita, 2016, ARC.

Comparative Evaluation of FPGA Implementation Alternatives for Real-Time Robust Ellipse Estimation based on RANSAC Algorithm

Yuichiro Shibata, Kiyoshi Oguri, Theint Theint Thu, 2017, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

Bayesian Multi-topic Microarray Analysis with Hyperparameter Reestimation

Tomonari Masada, Yuichiro Shibata, Kiyoshi Oguri, 2009, ADMA.

A comparative study of implementing N-body simulation on FPGAs, GPUs and general purpose processors (リコンフィギャラブルシステム)

Yuichiro Shibata, Kiyoshi Oguri, Khaled Benkrid, 2009 .

Multi-Level Optimization for Large Scale ASICS.

Kiyoshi Oguri, Akira Nagoya, Ryo Nomura, 1990, ICCAD 1990.

Deep-pipelined FPGA implementation of ellipse estimation for eye tracking

Yuichiro Shibata, Kiyoshi Oguri, Keisuke Dohi, 2012, 22nd International Conference on Field Programmable Logic and Applications (FPL).

A Fast Runtime Visualization Framework for Efficient Development of Scientific Applications on CUDA

Yuichiro Shibata, Kiyoshi Oguri, Keisuke Dohi, 2013 .

FPGA Implementation of A Graph Cut Algorithm For Stereo Vision

Yuichiro Shibata, Kiyoshi Oguri, Ryo Kamasaka, 2017, HEART.

FPGA Implementation of a Statically Reconfigurable Java Environment for Embedded Systems

Yuichiro Shibata, Kiyoshi Oguri, Takayuki Mori, 2007, 2007 International Conference on Field-Programmable Technology.

A datapath classification method for FPGA-based scientific application accelerator systems

Yuichiro Shibata, Kiyoshi Oguri, Hideharu Amano, 2010, 2010 International Conference on Field-Programmable Technology.

Synthesis From Pure Behavioral Descriptions

Kiyoshi Oguri, Akira Nagoya, Yukihiro Nakamura, 1991 .

Study of mirror box therapy support system by leap motion

Kiyoshi Oguri, Toshio Higashi, Makoto Fujimura, 2015, 2015 IEEE International Conference on Consumer Electronics - Taiwan.

A Combining Technique of Rate Law Functions for a Cost-Effective Reconfigurable Biological Simulator

Hiroaki Kitano, Yuichiro Shibata, Kiyoshi Oguri, 2007, 2007 International Conference on Field Programmable Logic and Applications.

Multi-level logic optimization for large scale ASICs

Kiyoshi Oguri, Yukihiro Nakamura, Akira Nagoya, 1990, 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.

Clustering Documents with Maximal Substrings

Atsuhiro Takasu, Tomonari Masada, Yuichiro Shibata, 2011, ICEIS.

The Plastic Cell Architecture for dynamic reconfigurable computing

Kiyoshi Oguri, Hideyuki Ito, Kouichi Nagami, 1998, Proceedings. Ninth International Workshop on Rapid System Prototyping (Cat. No.98TB100237).

Evaluation of Space Allocation Circuits

Yuichiro Shibata, Kiyoshi Oguri, Taichi Nagamoto, 2005, EUC.

Plastic cell architecture: towards reconfigurable computing for general-purpose

Kiyoshi Oguri, Hideyuki Ito, Kouichi Nagami, 1998, Proceedings. IEEE Symposium on FPGAs for Custom Computing Machines (Cat. No.98TB100251).

Plastic Cell Architecture: A Scalable Device Architecture for General-Purpose Reconfigurable Computing

Kiyoshi Oguri, Hideyuki Ito, Kouichi Nagami, 1998 .

A discussion on calculating eigenvalues of real symmetric tridiagonal matrices on a GPU

Yuichiro Shibata, Kiyoshi Oguri, Keisuke Dohi, 2011, CARN.

Accelerating Phase Correlation Functions Using GPU and FPGA

Yuichiro Shibata, Kiyoshi Oguri, Tsuyoshi Hamada, 2009, 2009 NASA/ESA Conference on Adaptive Hardware and Systems.

Discussion on High Level Synthesis FPGA Design of Camera Calibration

Yuichiro Shibata, Kiyoshi Oguri, Hiroki Nagayama, 2018, CISIS.

An FPGA-oriented Graph Cut Algorithm for Accelerating Stereo Vision

Yuichiro Shibata, Kiyoshi Oguri, Ryo Kamasaka, 2018, 2018 International Conference on ReConFigurable Computing and FPGAs (ReConFig).

A new stereo formulation not using pixel and disparity models pdf

Yuichiro Shibata, Kiyoshi Oguri, 2018, ArXiv.

A COMBININGTECHNIQUEOFRATELAW FUNCTIONSFOR A COST-EFFECTIVE RECONFIGURABLEBIOLOGICALSIMULATOR

Hiroaki Kitano, Yuichiro Shibata, Kiyoshi Oguri, 2007 .

Pattern Compression of FAST Corner Detection for Efficient Hardware Implementation

Yuichiro Shibata, Kiyoshi Oguri, Keisuke Dohi, 2011, 2011 21st International Conference on Field Programmable Logic and Applications.

Power Performance Profiling of 3-D Stencil Computation on an FPGA Accelerator for Efficient Pipeline Optimization

Yuichiro Shibata, Kiyoshi Oguri, Rie Soejima, 2016, CARN.

Automatic Pipeline Construction Focused on Similarity of Rate Law Functions for an FPGA-based Biochemical Simulator

Yuichiro Shibata, Kiyoshi Oguri, Hideharu Amano, 2010, IPSJ Trans. Syst. LSI Des. Methodol..

Asynchronous Bit-Serial Datapath for Object-Oriented Reconfigurable Architecture PCA

Yuichiro Shibata, Kiyoshi Oguri, Akira Nagoya, 2003, Asia-Pacific Computer Systems Architecture Conference.

New Area Management Method Based on "Pressure" for Plastic Cell Architecture

Yuichiro Shibata, Kiyoshi Oguri, Taichi Nagamoto, 2005, EUC.

Accelerating Collapsed Variational Bayesian Inference for Latent Dirichlet Allocation with Nvidia CUDA Compatible Devices

Tomonari Masada, Yuichiro Shibata, Kiyoshi Oguri, 2009, IEA/AIE.

Message routing latency-minimizing method in an ASIC design for distributed cooperative communication protocol processing

Kiyoshi Oguri, Hiroyuki Yamashita, Yasushi Okada, 1998, Systems and Computers in Japan.

Retrieving 3-d information with FPGA-based stream processing

Yuichiro Shibata, Kiyoshi Oguri, Shinsuke Nino, 2008, FPGA '08.

Flexible Hardware -What Will Be the Future Development of the Researches on Devices, Architectures, Design Technologies and Applications ?-

Kiyoshi Oguri, Hideharu Amano, Masato Motomura, 1999 .

Implementation of a Barotropic Operator for Ocean Model Simulation using a Reconfigurable Machine

Yuichiro Shibata, Kiyoshi Oguri, Duncan A. Buell, 2007, 2007 International Conference on Field Programmable Logic and Applications.

Pipeline Scheduling with Input Port Constraints for an FPGA-Based Biochemical Simulator

Yuichiro Shibata, Kiyoshi Oguri, Hideharu Amano, 2009, ARC.

High-Level Synthesis Design at NTT Systems Labs (Special Issue on Synthesis and Verification of Hardware Design)

Kiyoshi Oguri, Yukihiro Nakamura, Akira Nagoya, 1993 .

Documents as a Bag of Maximal Substrings - An Unsupervised Feature Extraction for Document Clustering

Tomonari Masada, Yuichiro Shibata, Kiyoshi Oguri, 2011, ICEIS.

Performance comparison of GPU programming frameworks with the striped Smith-Waterman algorithm

Yuichiro Shibata, Kiyoshi Oguri, Keisuke Dohi, 2012, CARN.

Asynchronous Circuit Design

Kiyoshi Oguri, K. Oguri, 2001 .

Steering Time-Dependent Estimation of Posteriors with Hyperparameter Indexing in Bayesian Topic Models

Atsuhiro Takasu, Tomonari Masada, Yuichiro Shibata, 2011, PAKDD.

Plastic Cell Architecture: A Dynamically Reconfigurable Hardware-Based Computer

Kiyoshi Oguri, Hideyuki Ito, Hiroshi Nakada, 1999, IPPS/SPDP Workshops.

AN IMPLEMENTATIONTECHNIQUEOF MULTI-CYCLEDARITHMETICFUNCTIONS FOR A DYNAMICALLYRECONFIGURABLEPROCESSOR

Yuichiro Shibata, Kiyoshi Oguri, Miwa Miyata, 2006 .

A proposal of a stream image compression architecture using neural networks

Kiyoshi Oguri, Kaoru Hamasaki, Yuuichiro Shibata, 2015 .

Message routing latency‐minimizing method in an ASIC design for distributed cooperative communication protocol processing

Kiyoshi Oguri, Hiroyuki Yamashita, Yasushi Okada, 1998 .

Dynamic hyperparameter optimization for bayesian topical trend analysis

Atsuhiro Takasu, Tomonari Masada, Yuichiro Shibata, 2009, CIKM.

Vector processor design for parallel DSP systems using hierarchical behavioral description based synthesizer

Kiyoshi Oguri, Hiroshi Nakada, Naohisa Ohta, 1990, Proceedings., 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors.

Power Performance Analysis of FPGA-Based Particle Filtering for Realtime Object Tracking

Yuichiro Shibata, Kiyoshi Oguri, Theint Theint Thu, 2017, CISIS.

FPGA-based Real-Time Object Tracking Using a Particle Filter with Stream Architecture

Yuichiro Shibata, Kiyoshi Oguri, Theint Theint Thu, 2016, 2016 Fourth International Symposium on Computing and Networking (CANDAR).

Implementation of a programming environment with a multithread model for reconfigurable systems

Tomonari Masada, Yuichiro Shibata, Kiyoshi Oguri, 2011, CARN.

Performance Modeling of Stencil Computing on a Stream-Based FPGA Accelerator for Efficient Design Space Exploration

Yuichiro Shibata, Kiyoshi Oguri, Keisuke Dohi, 2015, IEICE Trans. Inf. Syst..

An Implementation Technique of Multi-Cycled Arithmetic Functions For a Dynamically Reconfigurable Processor

Yuichiro Shibata, Kiyoshi Oguri, Hideyuki Tsuchiya, 2006, 2006 International Conference on Field Programmable Logic and Applications.

Configuring area and performance: Empirical evaluation on an FPGA-based biochemical simulator

Yuichiro Shibata, Kiyoshi Oguri, Hideharu Amano, 2009, 2009 International Conference on Field Programmable Logic and Applications.

HLS-Based FPGA Acceleration of Building-Cube Stencil Computation

Yuichiro Shibata, Kiyoshi Oguri, Rie Soejima, 2017, CISIS.

Bag of Timestamps: A Simple and Efficient Bayesian Chronological Mining

Atsuhiro Takasu, Tomonari Masada, Yuichiro Shibata, 2009, APWeb/WAIM.

An Implementation of Longest Prefix Matching for IP Router on Plastic Cell Architecture

Kiyoshi Oguri, Hiroshi Nakada, Norbert Imlig, 2000, FPL.

Discussion on power performance optimization for stream processing on an FPGA accelerator

Yuichiro Shibata, Kiyoshi Oguri, Rie Soejima, 2015 .

Inverter Reduction Algorithm for Super Fine-Grain Parallel Processing (Special Section of Selected Papers from the 9th Karuizawa Workshop on Circuits and Systems)

Kiyoshi Oguri, Yukihiro Nakamura, Hideyuki Ito, 1997 .

A Modular Approach to Heterogeneous Biochemical Model Simulation on an FPGA

Yuichiro Shibata, Kiyoshi Oguri, Hideharu Amano, 2009, 2009 International Conference on Reconfigurable Computing and FPGAs.

PCA-1: a fully asynchronous, self-reconfigurable LSI

Kiyoshi Oguri, Hideyuki Ito, Hiroshi Nakada, 2001, Proceedings Seventh International Symposium on Asynchronous Circuits and Systems. ASYNC 2001.

An optimization method focusing on fixed-point arithmetic in applications for dynamically reconfigurable processor

Yuichiro Shibata, Kiyoshi Oguri, Miwa Miyata, 2007, Systems and Computers in Japan.

Deep-pipelined FPGA Implementation of Real-time Object Tracking using a Particle Filter

Yuichiro Shibata, Kiyoshi Oguri, Theint Theint Thu, 2017, Int. J. Netw. Comput..