Stamatis G. Kavadias

Fine-grain OpenMP runtime support with explicit communication hardware primitives

Dimitrios S. Nikolopoulos, George Nikiforos, Vassilis Papaefstathiou, 2011, 2011 Design, Automation & Test in Europe.

NP-SARC: Scalable network processing in the SARC multi-core FPGA platform

Christoforos Kachris, George Nikiforos, Vassilis Papaefstathiou, 2013, J. Syst. Archit..

Cache-Integrated Network Interfaces: Flexible On-Chip Communication and Synchronization for Large-Scale CMPs

Dimitrios S. Nikolopoulos, Manolis Katevenis, Stamatis G. Kavadias, 2011, International Journal of Parallel Programming.

On-chip communication and synchronization mechanisms with cache-integrated network interfaces

Dimitrios S. Nikolopoulos, Manolis Katevenis, Stamatis G. Kavadias, 2010, Conf. Computing Frontiers.

Explicit Communication and Synchronization in SARC

Federico Silla, Dionisios N. Pnevmatikatos, Dimitrios S. Nikolopoulos, 2010, IEEE Micro.

Prototyping a Configurable Cache/Scratchpad Memory with Virtualized User-Level RDMA Capability

Dionisios N. Pnevmatikatos, George Nikiforos, Vassilis Papaefstathiou, 2019, Trans. High Perform. Embed. Archit. Compil..

Network Processing in Multi-core FPGAs with Integrated Cache-Network Interface

Christoforos Kachris, George Nikiforos, Vassilis Papaefstathiou, 2010, 2010 International Conference on Reconfigurable Computing and FPGAs.

Prototyping Efficient Interprocessor Communication Mechanisms

Dionisios N. Pnevmatikatos, Michael Papamichael, Vassilis Papaefstathiou, 2007, 2007 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation.

FPGA implementation of a configurable cache/scratchpad memory with virtualized user-level RDMA capability

Dionisios N. Pnevmatikatos, Xiaojun Yang, George Nikiforos, 2009, 2009 International Symposium on Systems, Architectures, Modeling, and Simulation.