S. Mir

发表

Analog Test Metrics Calculation Based on the Circuit Statistical Model

R. Euler, A. Bounceur, Kamel Beznia, 2013 .

ABILBO: Analog BuILt-in block observer

M. Lubaszewski, S. Mir, Leandro Pulz, 1996, Proceedings of International Conference on Computer Aided Design.

2015 JETTA Reviewers

Robert Wille, Yong-Bin Kim, Alexandre M. Amory, 2016, Journal of electronic testing.

Guest Editorial

Kwang-Ting Cheng, Salvador Mir, Andrew Richardson, 2006, Journal of electronic testing.

VLSI-SoC 2011 – The Advanced Research for Systems-on-chips

Chi-Ying Tsui, Salvador Mir, Ricardo Reis, 2012 .

VLSI-SoC: Advanced Research for Systems on Chip

Chi-Ying Tsui, Salvador Mir, Ricardo Reis, 2011, IFIP Advances in Information and Communication Technology.

Parameter identification of RF transceiver blocks using regressive models

Salvador Mir, Emmanuel Simeu, Rafik Khereddine, 2009, PDeS.

RF transceiver parameter identification using regressive models

S. Mir, R. Khereddine, E. Simeu, 2008, 2008 3rd International Conference on Design and Technology of Integrated Systems in Nanoscale Era.

Using Signal Envelope Detection for Online and Offline RF MEMS Switch Testing

Salvador Mir, Philippe Cauvet, Libor Rufer, 2008, VLSI Design.

Envelope Detection Based Transition Time Supervision for Online Testing of RF MEMS Switches

Salvador Mir, Hoang Nam Nguyen, Emmanuel Simeu, 2007, 13th IEEE International On-Line Testing Symposium (IOLTS 2007).

Adaptive Alternate Analog Test

Salvador Mir, Haralampos-G. D. Stratigopoulos, H. Stratigopoulos, 2011, IEEE Design & Test of Computers.

Towards design and validation of mixed-technology SOCs

Nacer-Eddine Zergainoh, Ahmed Amine Jerraya, Márta Rencz, 2000, ACM Great Lakes Symposium on VLSI.

Reduced-Code Linearity Testing of Pipeline ADCs

Salvador Mir, Haralampos-G. D. Stratigopoulos, Asma Laraba, 2013, IEEE Design & Test.

Defect-oriented non-intrusive RF test using on-chip temperature sensors

Salvador Mir, Haralampos-G. D. Stratigopoulos, Josep Altet, 2013, 2013 IEEE 31st VLSI Test Symposium (VTS).

Experiences with non-intrusive sensors for RF built-in test

Salvador Mir, Haralampos-G. D. Stratigopoulos, Louay Abdallah, 2012, 2012 IEEE International Test Conference.

Ternary Stimulus for Fully Digital Dynamic Testing of SC S? ADCs

S. Mir, M. Dubois, H. G. Stratigopoulos, 2012, 2012 IEEE 18th International Mixed-Signal, Sensors, and Systems Test Workshop.

Diagnosis of Local Spot Defects in Analog Circuits

Camelia Hora, Salvador Mir, Ke Huang, 2012, IEEE Transactions on Instrumentation and Measurement.

RF Front-End Test Using Built-in Sensors

Salvador Mir, Haralampos-G. D. Stratigopoulos, Louay Abdallah, 2011, IEEE Design & Test of Computers.

Estimation of Analog Parametric Test Metrics Using Copulas

Salvador Mir, Ahcène Bounceur, Haralampos-G. D. Stratigopoulos, 2011, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Analog test metrics estimates with PPM accuracy

Salvador Mir, Haralampos-G. D. Stratigopoulos, H. Stratigopoulos, 2010, 2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

Fault diagnosis of analog circuits based on machine learning

Salvador Mir, Ke Huang, Haralampos-G. D. Stratigopoulos, 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).

Defect filter for alternate RF test

Salvador Mir, Sule Ozev, Haralampos-G. D. Stratigopoulos, 2009, 2010 15th IEEE European Test Symposium.

Hierarchical parametric test metrics estimation: A ΣΔ converter BIST case study

Salvador Mir, Haralampos-G. D. Stratigopoulos, Matthieu Dubois, 2009, 2009 IEEE International Conference on Computer Design.

Evaluation of Analog/RF Test Measurements at the Design Stage

Salvador Mir, Ahcène Bounceur, Haralampos-G. D. Stratigopoulos, 2009, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

PFD output monitoring for RF PLL BIST

F. Badets, J.-L. Carbonero, A. Asquini, 2008, 2008 IEEE 14th International Mixed-Signals, Sensors, and Systems Test Workshop.

Estimation of Test Metrics for the Optimisation of Analogue Circuit Testing

Salvador Mir, Ahcène Bounceur, Luís Rolíndez, 2007, J. Electron. Test..

An implementation of memory-based on-chip analogue test signal generation

S. Mir, L. Rufer, L. Rufer, 2003, Proceedings of the ASP-DAC Asia and South Pacific Design Automation Conference, 2003..

Design of self-checking fully differential circuits and boards

Salvador Mir, Vladimir Kolarik, Marcelo Lubaszewski, 2000, IEEE Trans. Very Large Scale Integr. Syst..

Fault-based ATPG for linear analog circuits with minimal size multifrequency test sets

Salvador Mir, Marcelo Lubaszewski, Bernard Courtois, 1996, J. Electron. Test..

Analog checkers with absolute and relative tolerances

Salvador Mir, Vladimir Kolarik, Marcelo Lubaszewski, 1995, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

A Nonintrusive Machine Learning-Based Test Methodology for Millimeter-Wave Integrated Circuits

Sylvain Bourdel, Salvador Mir, Gildas Leger, 2020, IEEE Transactions on Microwave Theory and Techniques.

Assisted test design for non-intrusive machine learning indirect test of millimeter-wave circuits

Sylvain Bourdel, Salvador Mir, Manuel J. Barragan Asian, 2018, 2018 IEEE 23rd European Test Symposium (ETS).

Generation of Electrically Induced Stimuli for MEMS Self-Test

B. Courtois, B. Charlot, F. Parrain, 2001, J. Electron. Test..

Solutions for the self-adaptation of communicating systems in operation

Salvador Mir, Michel Renovell, Haralampos-G. D. Stratigopoulos, 2014, 2014 IEEE 20th International On-Line Testing Symposium (IOLTS).

Built-in test of millimeter-Wave circuits based on non-intrusive sensors

Salvador Mir, Haralampos-G. D. Stratigopoulos, Alexandre Siligaris, 2016, 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Understanding conditions for the single electron regime in 28 nm FD-SOI quantum dots: Interpretation of experimental data with 3D quantum TCAD simulations

M. Pioro-Ladrière, P. Galy, S. Rochette, 2023, Solid-State Electronics.

Behavioral modeling and simulation of a MEMS-based ultrasonic pulse-echo system

Salvador Mir, Libor Rufer, C. Domingues, 2002, Symposium on Design, Test, Integration, and Packaging of MEMS/MOEMS.

Bayesian Fault Diagnosis of RF Circuits Using Nonparametric Density Estimation

Salvador Mir, Ke Huang, Haralampos-G. D. Stratigopoulos, 2010, 2010 19th IEEE Asian Test Symposium.

Diagnosis in Linear and Nonlinear Mixed-Signal Systems : a Parameter Identification Based Technique

S. Mir, E. Simeu, 2017 .

Heuristic Reasoning For An Automatic Commonsense Understanding Of Logic Electronic Design Specificat

Salvador Mir, S. Mir, 1994 .

A Tool for Analog/RF BIST Evaluation Using Statistical Models of Circuit Parameters

Salvador Mir, Ahcène Bounceur, Reinhardt Euler, 2015, TODE.

Estimation of Analog/RF Parametric Test Metrics Based on a Multivariate Extreme Value Model

Salvador Mir, Reinhardt Euler, Kamel Beznia, 2020, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Multivariate statistical techniques for analog parametric test metrics estimation

Salvador Mir, Ke Huang, Ahcène Bounceur, 2013, 2013 8th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS).

Statistical modelling of analog circuits for test metrics computation

Salvador Mir, Ahcène Bounceur, Reinhardt Euler, 2013, 2013 8th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS).

Accurate estimation of analog test metrics with extreme circuits

Salvador Mir, Ke Huang, Ahcène Bounceur, 2012, 2012 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012).

Parametric Test Metrics Estimation Using Non-gaussian Copulas

Salvador Mir, Reinhardt Euler, Kamel Beznia, 2011, 2011 IEEE 17th International Mixed-Signals, Sensors and Systems Test Workshop.

Experimental Validation of a BIST Techcnique for CMOS Active Pixel Sensors

Gilles Sicard, Salvador Mir, Livier Lizarraga, 2009, 2009 27th IEEE VLSI Test Symposium.

Test limit evaluation for an ADC Design-for-Test approach by using a CAT platform

Salvador Mir, Salvador Bracho, Mar Martínez, 2008 .

CAT platform for analogue and mixed-signal test evaluation and optimization

Salvador Mir, Ahcène Bounceur, Luís Rolíndez, 2006, 2006 IFIP International Conference on Very Large Scale Integration.

Estimation of test metrics for multiple analogue parametric deviations

A. Bounceur, S. Mir, E. Simeu, 2006, International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006..