M. Tada

发表

Nonvolatile 32×32 crossbar atom switch block integrated on a 65-nm CMOS platform

N. Iguchi, N. Banno, M. Tada, 2012, 2012 Symposium on VLSI Technology (VLSIT).

Performance Modeling of Low-$k$/Cu Interconnects for 32-nm-Node and Beyond

M. Tada, Y. Hayashi, N. Inoue, 2009, IEEE Transactions on Electron Devices.

High-Density and Fault-Tolerant Cu Atom Switch Technology Toward 28nm-node Nonvolatile Programmable Logic

N. Banno, M. Tada, H. Hada, 2018, 2018 IEEE Symposium on VLSI Technology.

Polymer Solid-Electrolyte Switch Embedded on CMOS for Nonvolatile Crossbar Switch

T. Sakamoto, N. Banno, M. Tada, 2011, IEEE Transactions on Electron Devices.

Bidirectional TaO-diode-selected, complementary atom switch (DCAS) for area-efficient, nonvolatile crossbar switch block

N. Iguchi, N. Banno, M. Tada, 2013, 2013 Symposium on VLSI Technology.

Reliable solid-electrolyte crossbar switch for programmable logic device

N. Kasai, T. Sakamoto, N. Iguchi, 2010, 2010 Symposium on VLSI Technology.

A fast and low-voltage Cu complementary-atom-switch 1Mb array with high-temperature retention

N. Iguchi, N. Banno, M. Tada, 2014, 2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers.

Polymer solid-electrolyte (PSE) switch embedded in 90nm CMOS with forming-free and 10nsec programming for low power, nonvolatile programmable logic (NPL)

N. Sakimura, N. Iguchi, N. Banno, 2010, 2010 International Electron Devices Meeting.

Sub-μW standby power, <18 µW/DMIPS@25MHz MCU with embedded atom-switch programmable logic and ROM

N. Iguchi, N. Banno, M. Tada, 2015, 2015 Symposium on VLSI Technology (VLSI Technology).

First demonstration of logic mapping on nonvolatile programmable cell using complementary atom switch

N. Banno, M. Tada, T. Sakamoto, 2012, 2012 International Electron Devices Meeting.

A new approach for improving operating margin of unipolar ReRAM using local minimu m of reset voltage

M. Tada, H. Hada, M. Terai, 2010, 2010 Symposium on VLSI Technology.

High-Performance Cu-Interconnects with Novel Seamless Low-k SiOCH Stacks (SEALS) Featured by Compositional Modulation Process for 45nm-Node ULSI Devices

T. Fukai, T. Takeuchi, T. Iwamoto, 2006, 2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers..

Electronic Conduction Mechanism in Atom Switch Using Polymer Solid Electrolyte

M. Tada, T. Sakamoto, K. Okamoto, 2012, IEEE Transactions on Electron Devices.

Effects of material interfaces in Cu/low-/spl kappa/ damascene interconnects on their performance and reliability

M. Tada, Y. Hayashi, H. Ohtake, 2004, IEEE Transactions on Electron Devices.

Plasma Co-polymerization Technology with Molecular-level Structure Tightening in "In-situ" SiOCH Stacks for 32nm-node Cu Interconnects

T. Takeuchi, M. Tada, N. Inoue, 2006, 2006 International Electron Devices Meeting.

Highly scalable nonvolatile TiOx/TaSiOy solid-electrolyte crossbar switch integrated in local interconnect for low power reconfigurable logic

N. Kasai, N. Banno, M. Tada, 2009, 2009 IEEE International Electron Devices Meeting (IEDM).

Low temperature (≤ 380°C) and high performance Ge CMOS technology with novel source/drain by metal-induced dopants activation and high-k/metal gate stack for monolithic 3D integration

P. Kapur, M. Tada, Hyun-Yong Yu, 2008, 2008 IEEE International Electron Devices Meeting.

Robust Cu atom switch with over-400°C thermally tolerant polymer-solid electrolyte (TT-PSE) for nonvolatile programmable logic

N. Banno, M. Tada, T. Sakamoto, 2016, 2016 IEEE Symposium on VLSI Technology.

Highly reliable, complementary atom switch (CAS) with low programming voltage embedded in Cu BEOL for Nonvolatile Programmable Logic

N. Banno, M. Tada, T. Sakamoto, 2011, 2011 International Electron Devices Meeting.

Feasibility Study of 45-nm-Node Scaled-Down Cu Interconnects With Molecular-Pore-Stacking (MPS) SiOCH Films

T. Takeuchi, M. Tada, Y. Hayashi, 2007, IEEE Transactions on Electron Devices.

Via-Shape-Control for Copper Dual-Damascene Interconnects With Low-k Organic Film

T. Kikkawa, M. Tada, Y. Hayashi, 2008, IEEE Transactions on Semiconductor Manufacturing.

Improved reliability and switching performance of atom switch by using ternary Cu-alloy and RuTa electrodes

N. Banno, M. Tada, T. Sakamoto, 2012, 2012 International Electron Devices Meeting.

A low-power Cu atom switch programmable logic fabricated in a 40nm-node CMOS technology

N. Banno, M. Tada, T. Sakamoto, 2017, 2017 Symposium on VLSI Technology.

Cost-effective and High Performance Cu Interconnects (keff=2.75) with Continuous SiOCH Stack Incorporating a Low-k Barrier Cap (k=3.1)

T. Takeuchi, M. Tada, Y. Hayashi, 2007, 2007 IEEE International Electron Devices Meeting.

Robust Cu Dual Damascene Interconnects With Porous SiOCH Films Fabricated by Low-Damage Multi-Hard-Mask Etching Technology

M. Tada, Y. Hayashi, M. Tagami, 2006, IEEE Transactions on Semiconductor Manufacturing.

Nonvolatile solid-electrolyte switch embedded into Cu interconnect

N. Banno, M. Tada, T. Sakamoto, 2006, 2009 Symposium on VLSI Technology.

A novel two-varistors (a-Si/SiN/a-Si) selected complementary atom switch (2V-1CAS) for nonvolatile crossbar switch with multiple fan-outs

N. Banno, M. Tada, T. Sakamoto, 2015, 2015 IEEE International Electron Devices Meeting (IEDM).

Highly reliable, 65 nm-node Cu dual damascene interconnects with full porous-SiOCH (k=2.5) films for low-power ASICs

T. Takeuchi, M. Tada, N. Inoue, 2004, Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004..

Comprehensive Chemistry Designs in Porous SiOCH Film Stacks and Plasma Etching Gases for Damageless Cu Interconnects in Advanced ULSI Devices

T. Takeuchi, M. Tada, N. Inoue, 2008, IEEE Transactions on Semiconductor Manufacturing.

Improving Reliability of Copper Dual-Damascene Interconnects by Impurity Doping and Interface Strengthening

M. Tada, Y. Hayashi, N. Furutake, 2007, IEEE Transactions on Electron Devices.

45nm-node Interconnects with Porous SiOCH-Stacks, Tolerant of Low-Cost Packaging Applications

T. Takeuchi, M. Tada, N. Inoue, 2007, 2007 IEEE International Interconnect Technology Conferencee.

Robust porous SiOCH/Cu interconnects with ultrathin sidewall protection liners

T. Takeuchi, M. Tada, N. Inoue, 2006, IEEE Transactions on Electron Devices.

Highly-oriented PVD Ruthenium Liner for Low-resistance Direct-plated Cu Interconnects

M. Tada, Y. Hayashi, S. Saito, 2007, 2007 IEEE International Interconnect Technology Conferencee.