H. D. Lin

Room temperature 0.1 /spl mu/m CMOS technology with 11.8 ps gate delay

Y. G. Wey, Donald M. Tennant, Robert G. Swartz, 1993, Proceedings of IEEE International Electron Devices Meeting.

NEW ROBUST n+/p+ DUAL-GATE CMOS TECHNOLOGY OPTIMIZED FOR LOW POWER OPERATION

A. Kornblit, H. D. Lin, K. H. Lee, 1994 .

Formation of particles in a H2O2 counterflow diffusion flame doped with SiH4 or SiCl4

H. D. Lin, M. Tsai, S. Chung, 1991 .