Jianyi Meng

发表

TBCT: Time-Borrowing and Clock Token based error correction and its application in microprocessor

Chen Chen, Zhenqiang Yong, Xiaoyan Xiang, 2016, IEICE Electron. Express.

An effectiveness-oriented greedy heuristic for padding short paths in ultra-low supply voltage designs

Chen Chen, Yan He, Zhijian Chen, 2018, IEICE Electron. Express.

A metastability-immune error-resilient flip-flop for near-threshold variation-tolerant designs

Sheng Wang, Chen Chen, Xiaoyan Xiang, 2017, IEICE Electron. Express.

An Energy-Efficient ECG Processor With Weak-Strong Hybrid Classifier for Arrhythmia Detection

Jiaquan Wu, Zhijian Chen, Taotao Zhu, 2018, IEEE Transactions on Circuits and Systems II: Express Briefs.

Ultralow power processor employing block instruction for ECG applications

Jing Qiu, Zhijian Chen, Yong Ding, 2016, IEICE Electron. Express.

A dual-mode ECG processor with difference-insensitive QRS detection and lossless compression

Haibin Shen, Zhijian Chen, Xiaoyan Xiang, 2017, IEICE Electron. Express.

SCSE: Boosting Symbolic Execution via State Concretization

Huibin Wang, Chunqiang Li, Xiaoyan Xiang, 2019, IEICE Trans. Inf. Syst..

A prejugment based low power R-peak detection algorithm

Xiaolang Yan, Zhijian Chen, Jianyi Meng, 2014, 2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

EDSU: Error detection and sampling unified flip-flop with ultra-low overhead

Chen Chen, Xiaolang Yan, Xiaoyan Xiang, 2016, IEICE Electron. Express.

A Cross-layer based mapping for spiking neural network onto network on chip

Jianyi Meng, Yande Xiang, 2018, Int. J. Parallel Emergent Distributed Syst..

Balancing clock skew for near-threshold multi-voltage multi-power-mode designs using a multi-stage PMAB approach

Chen Chen, Yan He, Xiaoyan Xiang, 2016, 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

An energy-efficient microprocessor using multilevel error correction for timing error tolerance

Sheng Wang, Chen Chen, Xiaoyan Xiang, 2015, 2015 IEEE 11th International Conference on ASIC (ASICON).

A load balanced mapping for spiking neural network

De Ma, Jianyi Meng, Yande Xiang, 2017, 2017 2nd International Conference on Image, Vision and Computing (ICIVC).

A granular resampling method based energy-efficient architecture for heartbeat classification in ECG

Yin Xu, Zhijian Chen, Xiaoyan Xiang, 2017, IEICE Electron. Express.

ECG-Based Heartbeat Classification Using Two-Level Convolutional Neural Network and RR Interval Difference

Sheng Wang, Tao-Tao Zhu, Xiaoyan Xiang, 2018, IEICE Trans. Inf. Syst..

A low power QRS detection processor with adaptive scaling of processing resolution

Tao-Tao Zhu, Zhijian Chen, Xiaoyan Xiang, 2018, IEICE Electron. Express.

A timing failure tolerance design with in-field simultaneous error detection and correction

Chen Chen, Xiaoyan Xiang, Jianyi Meng, 2015, 2015 IEEE 11th International Conference on ASIC (ASICON).

A universal delay line circuit for variation resilient IC with self-calibrated time-to-digital converter

Youhua Shi, Weiwei Shan, Shuai Shao, 2015, 2015 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC).

Light-weight one-cycle timing error correction based on hardware software co-design

Xiaolang Yan, Xiaoyan Xiang, Jianyi Meng, 2016, IEICE Electronics Express.

SGERC: a self-gated timing error resilient cluster of sequential cells for wide-voltage processor

Tao-Tao Zhu, Chen Chen, Xiaoyan Xiang, 2017, IEICE Electron. Express.

A Highly Adaptive Lossless ECG Compression ASIC for Wireless Sensors Based on Hybrid Gomlomb Coding

Zhijian Chen, Xiaoyan Xiang, Jianyi Meng, 2018, IEICE Trans. Inf. Syst..

An alu-to-go ultra-low power dual mode processor

Xiaolang Yan, Jing Qiu, Jianyi Meng, 2014, 2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

An Energy-Efficient and Wide-Range Voltage Level Shifter With Dual Current Mirror

Chen Chen, Zhenqiang Yong, Xiaoyan Xiang, 2017, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A light-weight energy-efficient resilient circuit for variation tolerance

Sheng Wang, Chen Chen, Xiaoyan Xiang, 2017, 2017 IEEE 12th International Conference on ASIC (ASICON).

A lifting wavelet based lossless and lossy ECG compression processor for wireless sensors

Zhijian Chen, Xiaoyan Xiang, Jianyi Meng, 2017, IEICE Electron. Express.

An energy-efficient parallel VLSI architecture for SVM classification

Yin Xu, Zhijian Chen, Xiaoyan Xiang, 2018, IEICE Electron. Express.

A new error masking flip-flop with one cycle correction penalty

Chen Chen, Zhenqiang Yong, Xiaoyan Xiang, 2017, 2017 IEEE 12th International Conference on ASIC (ASICON).

Ultra low overhead error mask flip-flop in near threshold voltage processor design

Chen Chen, Xiaolang Yan, Jianyi Meng, 2016 .

Value locality based storage compression memory architecture for ECG sensor node

Chen Chen, Zhijian Chen, Jianyi Meng, 2015, Science China Information Sciences.

Low-power perceptron model based ECG processor for premature ventricular contraction detection

Tao-Tao Zhu, Zhijian Chen, Jianyi Meng, 2018, Microprocess. Microsystems.

Xuantie-910: A Commercial Multi-Core 12-Stage Pipeline Out-of-Order 64-bit High Performance RISC-V Processor with Vector Extension : Industrial Product

Yuan Xie, Xiaolang Yan, Yu Pu, 2020, 2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture (ISCA).

Relative ordering learning in spiking neural network for pattern recognition

Zhitao Lin, De Ma, Jianyi Meng, 2018, Neurocomputing.

A Q-routing based self-regulated routing scheme for network-on-chip

De Ma, Jianyi Meng, Yande Xiang, 2017, 2017 IEEE 9th International Conference on Communication Software and Networks (ICCSN).

A near threshold error resilient processor based on dynamic timing error prediction and within-a-cycle timing error correction

Tao-Tao Zhu, Chen Chen, Xiaoyan Xiang, 2015, 2015 IEEE 11th International Conference on ASIC (ASICON).

Electrocardiograph compression based on sifting process of empirical mode decomposition

Xiaoyan Xiang, Jianyi Meng, Chaojun Zhao, 2016 .