B. Joiner

Thermal sub-modeling of the wirebonded plastic ball grid array package

K. Ramakrishna, B. Joiner, Z. Johnson, 1997, Thirteenth Annual IEEE. Semiconductor Thermal Measurement and Management Symposium.

Effect of flag design on thermal performance of PBGA packages

B. Joiner, 2001, Seventeenth Annual IEEE Semiconductor Thermal Measurement and Management Symposium (Cat. No.01CH37189).

Measurement and Simulation of Stacked Die Thermal Resistances

B. Joiner, J.A. Montes de Oca, S. Neelakantan, 2006, IEEE Transactions on Components and Packaging Technologies.

Measurement and simulation of stacked die thermal resistances

S. Neelakantan, B. Joiner, J.M. de Oca, 2009, Twenty-Second Annual IEEE Semiconductor Thermal Measurement And Management Symposium.

Measurement and simulation of junction to board thermal resistance and its application in thermal modeling

B. Joiner, V. Adams, V. Adams, 1999, Fifteenth Annual IEEE Semiconductor Thermal Measurement and Management Symposium (Cat. No.99CH36306).

Thermal performance of flip chip ball grid array packages

B. Joiner, T. Montes de Oca, B. Joiner, 2002, Eighteenth Annual IEEE Semiconductor Thermal Measurement and Management Symposium. Proceedings 2002 (Cat.No.02CH37311).