Christel Wysocki

Guaranteeing Silicon Performance with FPGA Timing Models

Christel Wysocki, 2010 .

The stratixπ routing and logic architecture

Vaughn Betz, Jonathan Rose, David Jefferson, 2003, FPGA '03.

Blocks Phase-Locked Loops ( PLLs ) DSP Blocks M 4 K RAM Blocks MegaRAM TM Blocks I / O Elements ( IOEs )

Andy Lee, Christel Wysocki, C. Lane, 2003 .