Hsiao-Yu Huang

A 22-nm 1-Mb 1024-b Read Data-Protected STT-MRAM Macro With Near-Memory Shift-and-Rotate Functionality and 42.6-GB/s Read Bandwidth for Security-Aware Mobile Device

Yen-Cheng Chiu, Yu-Der Chih, Cheng-Xin Xue, 2021, IEEE Journal of Solid-State Circuits.

13.4 A 22nm 1Mb 1024b-Read and Near-Memory-Computing Dual-Mode STT-MRAM Macro with 42.6GB/s Read Bandwidth for Security-Aware Mobile Devices

Meng-Fan Chang, Yen-Cheng Chiu, Cheng-Xin Xue, 2020, 2020 IEEE International Solid- State Circuits Conference - (ISSCC).

A 22nm 4Mb STT-MRAM Data-Encrypted Near-Memory Computation Macro with a 192GB/s Read-and-Decryption Bandwidth and 25.1-55.1TOPS/W 8b MAC for AI Operations

Y. Chih, C. Lo, Chieh-Pu Lo, 2022, 2022 IEEE International Solid- State Circuits Conference (ISSCC).

A CMOS-integrated spintronic compute-in-memory macro for secure AI edge devices

Y. Chih, C. Lo, Chieh-Pu Lo, 2023, Nature Electronics.