Reza Sedaghat

发表

Dynamic strength scaling for delay fault propagation in nanometer technologies

Reza Sedaghat, Reza Javaheri, 2009, 2009 14th International CSI Computer Conference.

RAPID EXPLORATION OF COST-PERFORMANCE TRADEOFFS USING DOMINANCE EFFECT DURING DESIGN OF HARDWARE ACCELERATORS

Reza Sedaghat, Anirban Sengupta, 2014 .

Priority function based power efficient rapid Design Space Exploration of scheduling and module selection in high level synthesis

Reza Sedaghat, Anirban Sengupta, Pallabi Sarkar, 2011, 2011 24th Canadian Conference on Electrical and Computer Engineering(CCECE).

Exploration of optimal multi-cycle transient fault secured datapath during high level synthesis based on user area-delay budget

Reza Sedaghat, Anirban Sengupta, 2015, 2015 IEEE 28th Canadian Conference on Electrical and Computer Engineering (CCECE).

Strength violation effect on soft-error detection in sub-micron technology

Reza Sedaghat, M. Reza Javaheri, 2010, Microelectron. Reliab..

Rapid design space exploration for multi parametric optimization of VLSI designs

Reza Sedaghat, Anirban Sengupta, Zhipeng Zeng, 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

Multi-valued logic mapping of resistive short and open delay-fault testing in deep sub-micron technologies

Reza Sedaghat, M. Reza Javaheri, 2009, Microelectron. Reliab..

A novel framework of Optimizing modular computing architecture for multi objective VLSI designs

Reza Sedaghat, Anirban Sengupta, Zhipeng Zeng, 2009, 2009 International Conference on Microelectronics - ICM.

Complex Gain based Adaptive Digital Predistorter for Restoring Dynamic Range in ROF Link

Reza Sedaghat, Xavier Fernando, Hyunsuk Moon, 2005 .

Switch-level emulation of strength-base soft error detection

Reza Sedaghat, M. Reza Javaheri, Prabhleen K. Kalkat, 2011, Microelectron. Reliab..

A high level synthesis design flow with a novel approach for efficient design space exploration in case of multi-parametric optimization objective

Reza Sedaghat, Anirban Sengupta, Zhipeng Zeng, 2010, Microelectron. Reliab..

Rapid exploration of power-delay tradeoffs using hybrid priority factor and fuzzy search

Reza Sedaghat, Anirban Sengupta, 2010, 2010 International Conference on Microelectronics.

A New Adaptive Security Architecture with Extensible Computation Complexity for Generic Ciphers

Reza Sedaghat, Prathap Siddavaatam, 2019, J. Hardw. Syst. Secur..

Dynamic behavior of resistive faults in nanometer technology

Reza Sedaghat, Vadim Geurkov, Mayuri Kunchwar, 2007, Microelectron. Reliab..

Switch-level soft error emulation for SET-induced pulses of variable strengths

Reza Sedaghat, M. Reza Javaheri, Prabhleen K. Kalkat, 2010, Microelectron. J..

A fast algorithm to reduce 2-dimensional assignment problems to 1-dimensional assignment problems for FPGA-based fault simulation

Reza Sedaghat, 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

Rapid design space exploration by hybrid fuzzy search approach for optimal architecture determination of multi objective computing systems

Reza Sedaghat, Anirban Sengupta, Zhipeng Zeng, 2011, Microelectron. Reliab..

Swarm intelligence driven design space exploration of optimal k-cycle transient fault secured datapath during high level synthesis based on user power-delay budget

Reza Sedaghat, Anirban Sengupta, 2015, Microelectron. Reliab..

Soft error injection using advanced switch-level models for combinational logic in nanometer technologies

Reza Sedaghat, Reza Javaheri, Prabhleen K. Kalkat, 2009, 2009 International Conference on Microelectronics - ICM.

A Delta-Diagram Based Synthesis for Cross Layer Optimization Modeling of IoT

Reza Sedaghat, Prathap Siddavaatam, 2018, Trans. Comput. Sci..

Verification and fault synthesis algorithm at switch-level

Reza Sedaghat, M. Reza Javaheri, Leo Kant, 2006, Microprocess. Microsystems.

Rapid exploration of integrated scheduling and module selection in high level synthesis for application specific processor design

Reza Sedaghat, Anirban Sengupta, Pallabi Sarkar, 2012, Microprocess. Microsystems.

Routability estimation of FPGA-based fault injection

Reza Sedaghat, 2005 .

Optimized Predictive Zonal Search (OPZS) for block-based motion estimation

Reza Sedaghat, Behnaz Abdoli, Manuchehr Taghiloo, 2015, Signal Process. Image Commun..

Hardware efficient design of speed optimized power stringent Application Specific Processor

Reza Sedaghat, Anirban Sengupta, Zhipeng Zeng, 2009, 2009 International Conference on Microelectronics - ICM.

Integrated design space exploration based on power-performance trade-off using genetic algorithm

Reza Sedaghat, Anirban Sengupta, Pallabi Sarkar, 2011, ACAI '11.

Accelerated exploration of cost-performance tradeoffs for multi objective VLSI designs

Reza Sedaghat, Anirban Sengupta, 2010, 2010 International Conference on Microelectronics.

Routability estimation of FPGA-based fault injection

Reza Sedaghat, 2003, CCECE 2003 - Canadian Conference on Electrical and Computer Engineering. Toward a Caring and Humane Technology (Cat. No.03CH37436).

Grey Wolf Optimizer Driven design space exploration: A novel framework for multi-objective trade-off in architectural synthesis

Reza Sedaghat, Prathap Siddavaatam, Prathap Siddavaatam, 2019, Swarm Evol. Comput..

A High-level Synthesis Design Flow from ESL to RTL with Multi-parametric Optimization Objective

Reza Sedaghat, Anirban Sengupta, A. Sengupta, 2011 .

FPGA-Based adaptive digital predistortion for radio-over-fiber links

Reza Sedaghat, Hyunsuk Moon, 2006, Microprocess. Microsystems.

Application specific processor vs. microblaze soft core RISC processor: FPGA based performance and CPR analysis

Reza Sedaghat, Anirban Sengupta, Pallabi Sarkar, 2011, ACAI '11.

A multi structure genetic algorithm for integrated design space exploration of scheduling and allocation in high level synthesis for DSP kernels

Reza Sedaghat, Anirban Sengupta, Pallabi Sarkar, 2012, Swarm Evol. Comput..

Multi parametric optimized architectural synthesis of an application specific processor

Reza Sedaghat, Anirban Sengupta, Summit Sehgal, 2009, 2009 14th International CSI Computer Conference.

Adaptive digital predistortion of laser diode nonlinearity for wireless applications

Reza Sedaghat, Xavier Fernando, S. Nadarajah, 2003, CCECE 2003 - Canadian Conference on Electrical and Computer Engineering. Toward a Caring and Humane Technology (Cat. No.03CH37436).

Complex Energy Signal Model for Digital Human Fingerprint Matching

Reza Sedaghat, Jason Zalev, 2008 .

Multi-objective efficient design space exploration and architectural synthesis of an application specific processor (ASP)

Reza Sedaghat, Anirban Sengupta, Zhipeng Zeng, 2011, Microprocess. Microsystems.

Integrated scheduling, allocation and binding in High Level Synthesis for performance-area tradeoff of digital media applications

Reza Sedaghat, Anirban Sengupta, Pallabi Sarkar, 2011, 2011 24th Canadian Conference on Electrical and Computer Engineering(CCECE).

An adaptive security framework with extensible computational complexity for cipher systems

Reza Sedaghat, Prathap Siddavaatam, Min Hsuan Cheng, 2016, 2016 11th International Conference for Internet Technology and Secured Transactions (ICITST).

Transistor-level to gate-level comprehensive fault synthesis for n-input primitive gates

Reza Sedaghat, M. Reza Javaheri, Mayuri Kunchwar, 2006, Microelectron. Reliab..

Power gradient based Design Space Exploration in high level synthesis for DSP kernels

Reza Sedaghat, Pallabi Sarkar, Anirban Sengupta, 2011, ICM 2011 Proceeding.

intel-LEACH: An optimal framework for node selection using dynamic clustering for wireless sensor networks

Reza Sedaghat, Prathap Siddavaatam, Aakriti Tarun Sharma, 2017, 2017 12th International Conference for Internet Technology and Secured Transactions (ICITST).

A New Adaptable Construction of Modulo Addition with Scalable Security for Stream Ciphers

Reza Sedaghat, Prathap Siddavaatam, Min Hsuan Cheng, 2016, NSS.

Integrated scheduling, allocation and binding in High Level Synthesis using multi structure genetic algorithm based design space exploration

Reza Sedaghat, Anirban Sengupta, 2011, 2011 12th International Symposium on Quality Electronic Design.

A Novel Delay Fault Testing Methodology for Resistive Faults in Deep Sub-micron Technologies

Reza Sedaghat, M. Reza Javaheri, 2008 .

FPGA-based switch-level fault emulation using module-based dynamic partial reconfiguration

Reza Sedaghat, Peter Ming-Han Lee, 2008, Microelectron. Reliab..

A framework for fast design space exploration using fuzzy search for VLSI computing Architectures

Reza Sedaghat, Anirban Sengupta, Zhipeng Zeng, 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

EXECUTION TIME - AREA TRADEOFF IN GAUSING RESIDUAL LOAD DECODER: INTEGRATED EXPLORATION OF CHAINING BASED SCHEDULE AND ALLOCATION IN HLS FOR HARDWARE ACCELERATORS

Reza Sedaghat, Anirban Sengupta, Vipul Kumar Mishra, 2014 .

A novel multi-objective optimizer framework for TDMA-based medium access control in IoT

Reza Sedaghat, Prathap Siddavaatam, 2020, CSI Transactions on ICT.

Novel Hybrid GWO-WOA and BAT-PSO Algorithms for Solving Design Optimization Problems

Reza Sedaghat, Prathap Siddavaatam, Noel Jose Thengappurackal Laiju, 2021, Trans. Comput. Sci..

A New Bio-heuristic Hybrid Optimization for Constrained Continuous Problems

Reza Sedaghat, Prathap Siddavaatam, 2021, Trans. Comput. Sci..