F. Kuechenmeister

Chip package interaction (CPI) reliability of low-k/ULK interconnect with lead free technology

Frank Kuechenmeister, Michael Su, Lei Fu, 2010, 2010 Proceedings 60th Electronic Components and Technology Conference (ECTC).

Chip Board Interaction Analysis of 22-NM Fully Depeleted Silicon on Insulator (FD-SOI) Technology in Wafer Level Packaging (WLP)

Dirk Breuer, Jens Paul, Jae Kyu Cho, 2018, 2018 International Wafer Level Packaging Conference (IWLPC).

Chip Packaging Interaction (CPI) with Cu Pillar Flip Chip for 20 nm Silicon Technology and Beyond

S. Kannan, Shan Gao, R. S. Smith, 2015 .

The effect of polyimide surface treatment on flip-chip assembly

J. Chin, X. Zhao, Michael Su, 2009, 2009 16th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits.

Gold wire bond study for automotive application

C. Papadopoulos, J. Prinz, A. Rodríguez, 2020 .

Chip Package Interaction (CPI) risk assessment of 22FDX® Wafer Level Chip Scale Package (WLCSP) using 2D Finite Element Analysis modeling

Dirk Breuer, Jae Kyu Cho, Frank Kuechenmeister, 2020, 2020 IEEE 70th Electronic Components and Technology Conference (ECTC).

Thermo-compression bonding assembly process and reliability studies of Cu pillar bump on Cu/Low-K Chip

F. X. Che, Jong-Kai Lin, K. Y. Au, 2014, 2014 IEEE 16th Electronics Packaging Technology Conference (EPTC).

Chip Package Interaction (CPI) Stress Modeling

Dirk Breuer, Jens Paul, Frank Kuechenmeister, 2020, 2020 21st International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE).

Mechanical reliability assessment of 28nm Back End of Line (BEoL) stack using finite element analysis and validation

Dirk Breuer, Jens Paul, Frank Kuechenmeister, 2015, 2015 IEEE International Reliability Physics Symposium.

Experimental analyses of the mechanical reliability of advanced BEOL/fBEOL stacks regarding CPI loading

P. Hofmann, F. Kuechenmeister, D. Breuer, 2013, 2013 IEEE International Reliability Physics Symposium (IRPS).

Chip-package interaction: Challenges and solutions to mechanical stability of Back end of Line at 28nm node and beyond for advanced flip chip application

Chirag Shah, Dirk Breuer, Shan Gao, 2012, 2012 IEEE 14th Electronics Packaging Technology Conference (EPTC).

Chip Package Interaction with Cu Pillar Interconnects - Impact of Die Warpage

F. Kuechenmeister, Christian Goetze, S. Capecchi, 2019, European Microelectronics and Packaging Conference.