Toyohiko Yoshida

An Architectural Study of an MPEG-2 422P@HL Encoder Chip Set

Masahiko Yoshimoto, Satoshi Kumaki, Hidenori Sato, 2000 .

A strategy for avoiding pipeline interlock delays in a microprocessor

Yuichi Saito, Toyohiko Yoshida, Tatsuya Ueda, 1990, Proceedings., 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors.