Tadashi Shibata

发表

Automatic defects separation from background LSI patterns using advanced image processing techniques

Tadashi Shibata, Tadahiro Ohmi, Kazuyuki Maruo, 1997, 1997 IEEE International Symposium on Semiconductor Manufacturing Conference Proceedings (Cat. No.97CH36023).

An MTJ-based nonvolatile associative memory architecture with intelligent power-saving scheme for high-speed low-power recognition applications

Tadashi Shibata, Yitao Ma, Tetsuo Endoh, 2013, 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013).

Robust cephalometric landmark identification using support vector machines

Gert Cauwenberghs, Tadashi Shibata, Shantanu Chakrabartty, 2003, 2003 IEEE International Conference on Acoustics, Speech, and Signal Processing, 2003. Proceedings. (ICASSP '03)..

Quasi-parallel multi-path detection architecture using floating-gate-MOS-based CDMA matched filters

Tadashi Shibata, Toshihiko Yamasaki, Tomoyuki Nakayama, 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

A nano-functional-device-based image feature extraction circuitry with current-balancing feedback

Tadashi Shibata, Kazuma Yoshii, 2009, 2009 10th International Conference on Ultimate Integration of Silicon.

Low-power CDMA analog matched filters based on floating-gate technology

Tadashi Shibata, Toshihiko Yamasaki, T. Taguchi, 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

A Simple-Architecture Motion-Detection Analog VLSI Based on Quasi-Two-Dimensional Hardware Algorithm

Tadashi Shibata, Hiroe Kimura, 2004 .

Real-time reconfigurable logic circuits using neuron MOS transistors

Tadashi Shibata, K. Kotani, T. Ohmi, 1993, 1993 IEEE International Solid-State Circuits Conference Digest of Technical Papers.

A VLSI DBSCAN processor composed as an array of micro agents having self-growing interconnects

Hongbo Zhu, Tadashi Shibata, Atsushi Shimada, 2013, 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013).

A Low-Power Associative Processor with the R-th Nearest-Match Hamming-Distance Search Engine Employing Time-Domain Techniques

Tadashi Shibata, Trong Tu Bui, T. Shibata, 2010, 2010 Fifth IEEE International Symposium on Electronic Design, Test & Applications.

A gesture perception algorithm using compact one-dimensional representation of spatio-temporal motion-field patches

Tadashi Shibata, Ruihan Bao, T. Shibata, 2009, 2009 3rd International Conference on Signal Processing and Communication Systems.

An Ego-Motion Detection System Employing Directional-Edge-Based Motion Field Representations

Tadashi Shibata, Jia Hao, 2010, IEICE Trans. Inf. Syst..

An associative-processor-based mixed signal system for robust grayscale image recognition

Tadashi Shibata, Masakazu Yagi, 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

A speed adaptive ego-motion detection system using EDGE-histograms produced by variable graduation method

Tadashi Shibata, Jia Hao, 2007, 2007 15th European Signal Processing Conference.

Event recognition hardware based on neuron MOS soft-computing circuits

Tadashi Shibata, Tadahiro Ohmi, Yuichiro Yamashita, 1997 .

A real-time VLSI median filter employing two-dimensional bit-propagating architecture

Tadashi Shibata, Hideo Yamasaki, 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

An Intelligent Action Control System Based on Extended Vector Annotated Logic Program and its Hardware Implementation

Tadashi Shibata, Kazumi Nakamatsu, Yoshio Mita, 2007, Intell. Autom. Soft Comput..

Speaker and text independent language identification using predictive error histogram vectors

Tadashi Shibata, Qian-Rong Gu, 2003, 2003 IEEE International Conference on Acoustics, Speech, and Signal Processing, 2003. Proceedings. (ICASSP '03)..

Critical Boundary Vector Concept in Nearest Neighbor Classifiers using k-Means Centers for Efficient Template Reduction

Tadashi Shibata, Wenjun Xia, 2011, IJCCI.

Neuron-MOS-based association hardware for real-time event recognition

Tadashi Shibata, Tadahiro Ohmi, Yuichiro Yamashita, 1996, Proceedings of Fifth International Conference on Microelectronics for Neural Networks.

A VLSI Implementation of Rank-Order Searching Circuit Employing a Time-Domain Technique

Tadashi Shibata, Trong-Tu Bui, 2013 .

Blind image compression history determination using dynamic thresholding

Tadashi Shibata, Robert Grou-Szabo, 2008, 2008 IEEE International Conference on Acoustics, Speech and Signal Processing.

A Parzen-window classifier architecture for massively-integrated nanoscale resonant devices

Tadashi Shibata, Kyunghee Kang, 2009, 2009 10th International Conference on Ultimate Integration of Silicon.

Automatic Defect Pattern Detection on LSI Wafers Using Image Processing Techniques

Tadashi Shibata, Tadahiro Ohmi, Kazuyuki Maruo, 1999 .

A hardware-friendly object detection algorithm based on variable-block-size directional-edge histograms

Tadashi Shibata, Takashi Miyoshi, 2010, 2010 World Automation Congress.

Neuron MOS binary-logic integrated circuits. I. Design fundamentals and soft-hardware-logic circuit implementation

Tadashi Shibata, Tadahiro Ohmi, 1993 .

An Analog Visual Pre-Processing Processor.

Tadashi Shibata, Yoshio Mita, Yusuke Nakashita, 2005, NIPS 2005.

Normalized scoring of Hidden Markov Models by on-line learning and its application to gesture-sequence perception

Tadashi Shibata, Mio Nishiyama, 2009, 2009 16th IEEE International Conference on Image Processing (ICIP).

A Compact and Power-Efficient Implementation of Rank Order Filters Using Time-Domain Digital Computation Technique

Tadashi Shibata, Kiyoto Ito, Liem T. Nguyen, 2007 .

Neuron-MOS correlator based on Manhattan distance computation for event recognition hardware

Tadashi Shibata, Tadahiro Ohmi, M. Konda, 1996, 1996 IEEE International Symposium on Circuits and Systems. Circuits and Systems Connecting the World. ISCAS 96.

A Vlsi-Implementation-Friendly EGO-Motion Detection Algorithm Based on Edge-Histogram Matching

Tadashi Shibata, Jia Hao, 2006, 2006 IEEE International Conference on Acoustics Speech and Signal Processing Proceedings.

Intelligent Internet search applications based on VLSI associative processors

Tadashi Shibata, Huaiyu Xu, Yoshio Mita, 2002, Proceedings 2002 Symposium on Applications and the Internet (SAINT 2002).

A Real-Time Motion-Feature-Extraction VLSI Employing Digital-Pixel-Sensor-Based Parallel Architecture

Hongbo Zhu, Tadashi Shibata, 2014, IEEE Transactions on Circuits and Systems for Video Technology.

A dominant-noise discrimination system for images corrupted by content-independent noises without a priori references

Tadashi Shibata, Robert Grou-Szabo, 2011, 2011 5th International Conference on Signal Processing and Communication Systems (ICSPCS).

A Brain-Inspired VLSI Architecture for Nano Devices and Circuits

Tadashi Shibata, 2010 .

Studying LSI Tamper Resistance with Respect to Techniques Developed for Failure Analysis

Tadashi Shibata, Atsuhiro Yamagishi, Tsutomu Matsumoto, 2005 .

The Concept of Four-Terminal Devices and Its Significance in the Implementation of Intelligent Integrated Circuits

Tadashi Shibata, Tadahiro Ohmi, 1994 .

Right brain computing hardware: a psychological brain model on silicon

Tadashi Shibata, 1998, 1998 Second International Conference. Knowledge-Based Intelligent Electronic Systems. Proceedings KES'98 (Cat. No.98EX111).

An excellent weight-updating-linearity EEPROM synapse memory cell for self-learning Neuron-MOS neural networks

Tadashi Shibata, Tadahiro Ohmi, Hiroshi Ishii, 1993 .

A high-frame-rate dense motion vector field generation processor with simplified best-match searching circuitries

Tadashi Shibata, Yuta Okano, 2009, 2009 IEEE Asian Solid-State Circuits Conference.

A self-learning multiple-class classifier using multi-dimensional quasi-Gaussian analog circuits

Tadashi Shibata, Kyunghee Kang, Zhuoli Sun, 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

Association hardware for intelligent electronic systems

Tadashi Shibata, Koji Kotani, Tadahiro Ohmi, 1999, Systems and Computers in Japan.

A low-power switched-current CDMA matched filter employing MOS-linear matching cell and output A/D converter

Tadashi Shibata, Toshihiko Yamasaki, Tomoyuki Nakayama, 2005, 2005 IEEE International Symposium on Circuits and Systems.

A neuron-MOS neural network using self-learning-compatible synapse circuits

Tadashi Shibata, Tadahiro Ohmi, Hiroshi Ishii, 1995, IEEE J. Solid State Circuits.

A human-perception-like image recognition system based on PAP vector representation with multi resolution concept

Tadashi Shibata, Masakazu Yagi, 2002, 2002 IEEE International Conference on Acoustics, Speech, and Signal Processing.

An Analog Edge-Filtering Processor Employing Only-Nearest-Neighbor Interconnects

Tadashi Shibata, Yoshio Mita, Yusuke Nakashita, 2004 .

Coupled-Oscillator Associative Memory Array Operation for Pattern Recognition

Tadashi Shibata, Wolfgang Porod, Dmitri E. Nikonov, 2015, IEEE Journal on Exploratory Solid-State Computational Devices and Circuits.

A fast self-convergent flash-memory programming scheme for MV and analog data storage

Tadashi Shibata, Toshihiko Yamasaki, D. Kobayashi, 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

A scalable architecture of associative processors employing nano functional devices

Tadashi Shibata, Trong Tu Bui, 2009, 2009 10th International Conference on Ultimate Integration of Silicon.

An analog on-line-learning K-means processor employing fully parallel self-converging circuitry

Tadashi Shibata, Renyuan Zhang, 2013 .

A new distance measure employing element-significance factors for robust image classification

Tadashi Shibata, Kunio Kawahara, 2005, 2005 13th European Signal Processing Conference.

Implementing Intelligence in Silicon Integrated Circuits Using Neuron-Like High-Functionality Transistors

Tadashi Shibata, Tadahiro Ohmi, 1996, J. Robotics Mechatronics.

A Computational Digital Pixel Sensor Featuring Block-Readout Architecture for On-Chip Image Processing

Tadashi Shibata, Kiyoto Ito, Benjamas Tongprasit, 2009, IEEE Transactions on Circuits and Systems I: Regular Papers.

SoC for DVD Player Applications

Tadashi Shibata, Takashi Morie, Toshihiko Takahashi, 2003 .

A Contour-Lithography Method for Etching Nano-dimension and Large-dimension Openings

Tadashi Shibata, Yoshio Mita, Tarik Bourouina, 2006 .

A Directional-Edge-Based Real-Time Object Tracking System Employing Multiple Candidate-Location Generation

Hongbo Zhu, Pushe Zhao, Tadashi Shibata, 2013, IEEE Transactions on Circuits and Systems for Video Technology.

Analog Soft-Pattern-Matching Classifier using Floating-Gate MOS Technology

Tadashi Shibata, Toshihiko Yamasaki, 2001, NIPS.

A hardware friendly algorithm for action recognition using spatio-temporal motion-field patches

Tadashi Shibata, Ruihan Bao, 2013, Neurocomputing.

A Non-subtraction Configuration of Self-similitude Architecture for Multiple-Resolution Edge-Filtering CMOS Image Sensor

Tadashi Shibata, Norihiro Takahashi, 2009, ICANN.

Translation-invariant motion perception for multiple objects using grid partitioning representation

Tadashi Shibata, Mio Nishiyama, 2012, 2012 6th International Conference on Signal Processing and Communication Systems.

Association hardware for intelligent electronic systems

Tadashi Shibata, Koji Kotani, Tadahiro Ohmi, 1999, Systems and Computers in Japan.

Scene image recognition based on the sequence of local image vectors represented by oriented edges

Tadashi Shibata, Shigetaka Morikawa, 2012, 2012 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP).

Implementing brain-like systems using nano functional devices

Tadashi Shibata, 2009, 2009 10th International Conference on Ultimate Integration of Silicon.

A Hierarchical Action Recognition System Applying Fisher Discrimination Dictionary Learning via Sparse Representation

Tadashi Shibata, Ruihan Bao, 2012, ICAISC.

Self-adaptive quasi-Gaussian circuits for analog on-chip-trainable multi-class classifiers

Tadashi Shibata, Wenjun Xia, 2012, 2012 IEEE International Symposium on Circuits and Systems.

Illumination-invariant face identification using edge-based feature vectors in pseudo-2D Hidden Markov Models

Tadashi Shibata, Yasufumi Suzuki, 2006, 2006 14th European Signal Processing Conference.

A row-parallel cyclic-line-access edge detection CMOS image sensor employing global thresholding operation

Tadashi Shibata, Norihiro Takahashi, T. Shibata, 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

An On-Chip-Trainable Gaussian-Kernel Analog

Tadashi Shibata, Kyunghee Kang, 2010 .

Multi-view face detection and pose estimation employing edge-based feature vectors

Tadashi Shibata, Masakazu Yagi, Yasufumi Suzuki, 2006, 2006 14th European Signal Processing Conference.

Neuron-MOS Parallel Search Hardware for Real-Time Signal Processing

Tadashi Shibata, Tadahiro Ohmi, Tsutomu Nakai, 1997 .

Hardware-Oriented Learning Algorithm Implemented on Silicon Using Neuron MOS Technology

Tadashi Shibata, Tadahiro Ohmi, Hiroshi Ishii, 1994 .

Human-perception-like image recognition system based on the Associative Processor architecture

Tadashi Shibata, Masakazu Yagi, Kenji Takada, 2002, 2002 11th European Signal Processing Conference.

A Pixel-Parallel Self-Similitude Processing for Multiple-Resolution Edge-Filtering Analog Image Sensors

Tadashi Shibata, Norihiro Takahashi, Kazuhide Fujita, 2009, IEEE Transactions on Circuits and Systems I: Regular Papers.

On-the-fly Sorting VLSI Based on Associative Processor Architecture

Tadashi Shibata, Hitoshi Hayakawa, Ken Takata, 2007 .

A Directional-Edge-Based Face Detection Algorithm Adapted to the VLSI Image Recognition System

Tadashi Shibata, Yasufumi Suzuki, T. Shibata, 2011 .

High-precision analog EEPROM with real-time write monitoring

Tadashi Shibata, Tadahiro Ohmi, Yuichiro Yamashita, 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

A low-power switched-current CDMA matched filter employing MOS linear matching cell with on-chip A/D converter

Tadashi Shibata, Toshihiko Yamasaki, Tomoyuki Nakayama, 2009, Integr..

A Current-Mode Multiple-Resolution Edge-Filtering Complementary Metal Oxide Semiconductor Image Sensor Employing Self-Similitude Processing in Non-Subtraction Configuration

Tadashi Shibata, Norihiro Takahashi, 2010 .

Neuron MOS winner-take-all circuit and its application to associative memory

Tadashi Shibata, Tadahiro Ohmi, T. Yamashita, 1993, 1993 IEEE International Solid-State Circuits Conference Digest of Technical Papers.

Power-balanced reconfigurable floating-gate-MOS logic circuit for tamper resistant VLSI

Tadashi Shibata, Benjamas Tongprasit, 2006, 2006 IEEE International Symposium on Circuits and Systems.

An image representation algorithm compatible with neural-associative-processor-based hardware recognition systems

Tadashi Shibata, Masakazu Yagi, 2003, IEEE Trans. Neural Networks.

An analog self-similitude edge-filtering processor for multiple-resolution image perception

Tadashi Shibata, Norihiro Takahashi, Kazuhide Fujita, 2008, 2008 IEEE International Symposium on Circuits and Systems.

Requirements of CAM in IC technology

Tadashi Shibata, Tadahiro Ohmi, 1991 .

Functional-device-based VLSI for intelligent electronic systems

Tadashi Shibata, 1998, Proceedings. 1998 28th IEEE International Symposium on Multiple- Valued Logic (Cat. No.98CB36138).

A vertical-MOSFET-based digital core circuit for high-speed low-power vector matching

Tadashi Shibata, Yitao Ma, Tetsuo Endoh, 2011, 2011 International SoC Design Conference.

A Psychologically－Inspired New VLSI Processor Architecture

Tadashi Shibata, 2010 .

Low-Power Analog Associative Processors Employing Resonance-Type Current-Voltage Characteristics

Tadashi Shibata, Trong Tu Bui, 2010 .

Spatio-temporal motion field descriptors for the hierarchical action recognition system

Tadashi Shibata, Ruihan Bao, 2011, 2011 5th International Conference on Signal Processing and Communication Systems (ICSPCS).

A hardware-friendly soft-computing algorithm for image recognition

Tadashi Shibata, Masakazu Yagi, Masayoshi Adachi, 2000, 2000 10th European Signal Processing Conference.

A functional MOS transistor featuring gate-level weighted sum and threshold operations

Tadashi Shibata, Tadahiro Ohmi, T. Shibata, 1992 .

Non-Boolean Associative Processing: Circuits, System Architecture, and Algorithms

Tadashi Shibata, Donald M. Chiarulli, Steven P. Levitan, 2015, IEEE Journal on Exploratory Solid-State Computational Devices and Circuits.

New compact and power-efficient implementations of rank-order-filters and sorting engines using time-domain computation technique (画像工学)

Tadashi Shibata, Kiyoto Ito, Liem T. Nguyen, 2007 .

Bio Inspired Architectures in the Nanoscale Integration Era

Tadashi Shibata, T. Shibata, 2009 .

A real-time image feature vector generator employing functional cache memory for edge flags

Tadashi Shibata, Takuki Nakagawa, 2009, 2009 IEEE International Symposium on Circuits and Systems.

Bio-inspired devices, circuits and systems

Tadashi Shibata, 2009, 2009 Proceedings of the European Solid State Device Research Conference.

A real-time center-of-mass tracker circuit implemented by neuron MOS technology

Tadashi Shibata, Tadahiro Ohmi, N. M. Yu, 1998 .

A Robust Medical Image Recognition System Employing Edge-Based Feature Vector Representation

Tadashi Shibata, Masakazu Yagi, Kenji Takada, 2003, SCIA.

Hardware Architecture for Pseudo-2D Hidden-Markov-Model-Based Face Recognition System Employing Laplace Distribution Functions

Tadashi Shibata, Yasufumi Suzuki, 2006 .

Real-Time On-Line-Learning Support Vector Machine Based on a Fully-Parallel Analog VLSI Processor

Tadashi Shibata, Renyuan Zhang, 2012, ICAISC.

Unsupervised Object Extraction by Contour Delineation and Texture Discrimination Based on Oriented Edge Features

Tadashi Shibata, Litian Sun, T. Shibata, 2014, IEEE Transactions on Circuits and Systems for Video Technology.

A multiple-candidate-regeneration-based object tracking system with enhanced learning capability by nearest neighbor classifier

Hongbo Zhu, Pushe Zhao, Tadashi Shibata, 2013, 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013).

A Neuron-MOS-Based VLSI Implementation of Pulse-Coupled Neural Networks for Image Feature Generation

Tadashi Shibata, Jun Chen, 2010, IEEE Transactions on Circuits and Systems I: Regular Papers.

Spatiotemporal projection of motion field sequence for generating feature vectors in gesture perception

Tadashi Shibata, Hitoshi Hayakawa, 2008, 2008 IEEE International Symposium on Circuits and Systems.

(Invited) A Brain-Inspired VLSI Architecture for Nano Devices and Circuits

Tadashi Shibata, 2010 .

A real-time motion-feature-extraction image processor employing digital-pixel-sensor-based parallel architecture

Hongbo Zhu, Tadashi Shibata, 2012, 2012 IEEE International Symposium on Circuits and Systems.

Simple-Architecture Motion-Detection Analog VLSI Based on Quasi-Two-Dimensional Processing

Tadashi Shibata, Hiroe Kimura, 2002 .

A Fully-Parallel Analog Vector Matching LSI for Robust Image Recognition

Tadashi Shibata, Masakazu Yagi, Toshihiko Yamasaki, 2002 .

An Analog Visual Pre-Processing Processor Employing Cyclic Line Access in Only-Nearest-Neighbor-Interconnects Architecture

Tadashi Shibata, Yoshio Mita, Yusuke Nakashita, 2005, NIPS.

A time-domain gradient-detection architecture for VLSI analog motion sensors

Tadashi Shibata, Kiyoto Ito, 2006, 2006 IEEE International Symposium on Circuits and Systems.

Optimizing Associative Processor Architecture for Intelligent Internet Search Applications

Tadashi Shibata, Yoshio Mita, Huaiyu Xu, 2001 .

A Neuron-MOS Neural Network Using Low-Power Self-Learning-Compatible Synapse Cells

Tadashi Shibata, Tadahiro Ohmi, Hiroshi Ishii, 1994 .

A bump-circuit-based motion detector using projected-activity histograms

Tadashi Shibata, Toshihiko Yamasaki, Masayuki Umejima, 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

Neuron-MOS Temporal Winner Search Hardware for Fully-Parallel Data Processing

Tadashi Shibata, Tadahiro Ohmi, Tatsuo Morimoto, 1995, NIPS.

A Mixed-Signal VLSI for Real-Time Generation of Edge-Based Image Vectors

Tadashi Shibata, Masakazu Yagi, Hideo Yamasaki, 2003, NIPS.

An On-Chip-Trainable Gaussian-Kernel Analog Support Vector Machine

Tadashi Shibata, Kyunghee Kang, T. Shibata, 2010, IEEE Transactions on Circuits and Systems I: Regular Papers.

Tadashi Shibata, Toshihiko Yamasaki, 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

An Edge Cache Memory Architecture for Early Visual Processing VLSIs

Tadashi Shibata, Ovgu Ozturk, 2006 .

Special Section on Advanced Processors Based on Novel Concepts in Computation

Tadashi Shibata, 2008, IEICE Trans. Electron..

Hardware-learning neural network LSI using a highly-functional transistor simulating neuron actions

Tadashi Shibata, Tadahiro Ohmi, Hiroshi Ishii, 1993, Proceedings of 1993 International Conference on Neural Networks (IJCNN-93-Nagoya, Japan).

Implementing Intelligence on Silicon Using Neuron-Like Functional MOS Transistors

Tadashi Shibata, Koji Kotani, Tadahiro Ohmi, 1993, NIPS.

Directional-edge-space processing for multiple-resolution image perception

Tadashi Shibata, Hyun-Soo Kim, 2010, 2010 World Automation Congress.

Clocked-neuron-MOS logic circuits employing auto-threshold-adjustment

Tadashi Shibata, Tadahiro Ohmi, Koji Kotani, 1995, Proceedings ISSCC '95 - International Solid-State Circuits Conference.

An edge-based face detection algorithm robust against illumination, focus, and scale variations

Tadashi Shibata, Yasufumi Suzuki, 2004, 2004 12th European Signal Processing Conference.

A Nearest Neighbor Classifier Employing Critical Boundary Vectors for Efficient On-Chip Template Reduction

Tadashi Shibata, Wenjun Xia, Yoshio Mita, 2016, IEEE Transactions on Neural Networks and Learning Systems.

A real-time image recognition system using a global directional-edge-feature extraction VLSI processor

Tadashi Shibata, Hongbo Zhu, 2009, 2009 Proceedings of ESSCIRC.

Validating directional edge-based image feature representations in face recognition by spatial correlation-based clustering

Tadashi Shibata, Yasufumi Suzuki, 2007, 2007 15th European Signal Processing Conference.

Multiple-clue face detection algorithm using edge-based feature vectors

Tadashi Shibata, Yasufumi Suzuki, 2004, 2004 IEEE International Conference on Acoustics, Speech, and Signal Processing.

VLSI processor with a configurable processing element array for balanced feature extraction in high-resolution images

Tadashi Shibata, Hongbo Zhu, 2014 .

A single-chip 600-fps real-time action recognition system employing a hardware friendly algorithm

Nanning Zheng, Hongbo Zhu, Tadashi Shibata, 2014, 2014 IEEE International Symposium on Circuits and Systems (ISCAS).

Analog Edge-Filtering Processor Employing Only-Nearest-Neighbor Interconnects

Tadashi Shibata, Yoshio Mita, Yusuke Nakashita, 2005 .

A Compact Memory-Merged Vector-Matching Circuitry for Neuron-MOS Associative Processor (Special Issue on Integrated Electronics and New System Paradigms)

Tadashi Shibata, Tadahiro Ohmi, Masahiro Konda, 1999 .

Neuron-MOS multiple-valued memory technology for intelligent data processing

Tadashi Shibata, Tadahiro Ohmi, T. Yamashita, 1994, Proceedings of IEEE International Solid-State Circuits Conference - ISSCC '94.

An on-chip-trainable Gaussian-kernel analog support vector machine

Tadashi Shibata, Kyunghee Kang, 2009, 2009 IEEE International Symposium on Circuits and Systems.

Neuron-MOS continuous-time winner-take-all circuit for intelligent data processing

Tadashi Shibata, Tadahiro Ohmi, Tatsuo Morimoto, 1998, 1998 Second International Conference. Knowledge-Based Intelligent Electronic Systems. Proceedings KES'98 (Cat. No.98EX111).

Block-matching-based CMOS optical flow sensor using only-nearest-neighbor computation

Tadashi Shibata, Yudai Fukuoka, 2009, 2009 IEEE International Symposium on Circuits and Systems.

Block-matching-based motion field generation utilizing directional edge displacement

Tadashi Shibata, Hitoshi Hayakawa, 2010, Comput. Electr. Eng..

A computational digital-pixel-sensor VLSI featuring block-readout architecture for pixel-parallel rank-order filtering

Tadashi Shibata, Kiyoto Ito, Benjamas Tongprasit, 2005, 2005 IEEE International Symposium on Circuits and Systems.

Real-Time Object Tracking Algorithm Employing On-Line Support Vector Machine and Multiple Candidate Regeneration

Pushe Zhao, Tadashi Shibata, Renyuan Zhang, 2012, ICAISC.

Digit-writing hand gesture recognition by hand-held camera motion analysis

Tadashi Shibata, Jia Hao, 2009, 2009 3rd International Conference on Signal Processing and Communication Systems.

Fully Parallel Self-Learning Analog Support Vector Machine Employing Compact Gaussian Generation Circuits

Tadashi Shibata, Renyuan Zhang, 2012 .

Robust cephalometric landmark identification using support vector machines

Gert Cauwenberghs, Tadashi Shibata, Shantanu Chakrabartty, 2003, 2003 International Conference on Multimedia and Expo. ICME '03. Proceedings (Cat. No.03TH8698).

A Compact Bell-Shaped Analog Matching Cell Module for Digital-Memory-Based Associative Processors

Tadashi Shibata, Trong Tu Bui, 2007 .

Unsupervised object extraction by contour delineation and texture-based discrimination

Tadashi Shibata, Litian Sun, 2012, 2012 Proceedings of the 20th European Signal Processing Conference (EUSIPCO).

Intelligence implementation on silicon based on four-terminal device electronics

Tadashi Shibata, Tadahiro Ohmi, 1995, Proceedings of International Conference on Microelectronics.

Low Power Neuron-MOS Technology for High-Functionality Logic Gate Synthesis

Tadashi Shibata, Tadahiro Ohmi, Koji Kotani, 1997 .

A single-motion-vector/cycle-generation optical flow processor employing directional-edge histogram matching

Tadashi Shibata, Kiyoto Ito, Kazuhide Fujita, 2009, 2009 IEEE International Symposium on Circuits and Systems.

Guest editorial - Special issue on neural networks hardware implementations

Tadashi Shibata, Giacomo Indiveri, Andreas G. Andreou, 2003, IEEE Trans. Neural Networks.

Fully-Parallel VLSI Implementation of Vector Quantization Processor Using Neuron-MOS Technology (Special Issue on Integrated Electronics and New System Paradigms)

Tadashi Shibata, Tadahiro Ohmi, Masahiro Konda, 1999 .

Multiple-resolution edge-based feature representations for robust face segmentation and verification

Tadashi Shibata, Yasufumi Suzuki, 2005, 2005 13th European Signal Processing Conference.

A zone-programmed EEPROM with real-time write monitoring for analog data storage

Tadashi Shibata, Tadahiro Ohmi, Toshiyuki Nozawa, 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

An integrated communication and control system for a multi-link active catheter

Tadashi Shibata, Zheye Wang, Toshikazu Nishino, 2017 .

A motion-based analog VLSI saliency detector using quasi-two-dimensional hardware algorithm

Tadashi Shibata, Hiroe Kimura, 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

Self-Aligned Aluminum-Gate MOSFET's Having Ultra-Shallow Junctions Formed by 450℃ Furnace Annealing (Special Issue on Sub-Half Micron Si Device and Process Technologies)

Tadashi Shibata, Koji Kotani, Tadahiro Ohmi, 1993 .

Eliminating Metal‐Sputter Contamination in Ion Implanter for Low‐Temperature‐Annealed, Low‐Reverse‐Bias‐Current Junctions

Tadashi Shibata, Tadahiro Ohmi, Takahisa Nitta, 1995 .

Soft-Computing Integrated Circuits for Intelligent Information Processing

Tadashi Shibata, Masakazu Yagi, Masayoshi Adachi, 1999 .

A low damage, low contaminant plasma processing system utilizing energy clean technology

Tadashi Shibata, Tadahiro Ohmi, Osamu Kamiya, 1991 .

Electrical characterization of epitaxial silicon films formed by a low kinetic energy particle process

Tadashi Shibata, Tadahiro Ohmi, Hiroshi Iwabuchi, 1989 .

In situ-doped epitaxial silicon film growth at 250 degrees C by an ultra-clean low-energy bias sputtering

Tadashi Shibata, Tadahiro Ohmi, K. Hashimoto, 1989, International Technical Digest on Electron Devices Meeting.

Special Issue on Vacuum Technology. Ultra Clean Technology for Semiconductor Manufacturing.

Tadashi Shibata, Tadahiro Ohmi, Tadashi Shibata, 1991 .

Coupled-Oscillator Associative Memory Array Operation

Tadashi Shibata, Wolfgang Porod, Dmitri E. Nikonov, 2013 .

Formation of High Quality Pure Aluminum Films by Low Kinetic Energy Particle Bombardment

Tadashi Shibata, Tadahiro Ohmi, Hideshi Kuwabara, 1990 .

Compact Bell-Shaped Analog Matching-Cell Module for Digital-Memory-Based Associative Processors

Tadashi Shibata, T. Shibata, Trong-Tu Bui, 2008 .

Electrical Properties of Giant‐Grain Copper Thin Films Formed by a Low Kinetic Energy Particle Process

Tadashi Shibata, Tadahiro Ohmi, Masahito Otsuki, 1992 .

Evaluating the Large Electromigration Resistance of Copper Interconnects Employing a Newly Developed Accelerated Life‐Test Method

Tadashi Shibata, Tadahiro Ohmi, Takahisa Nitta, 1993 .

Clock-controlled neuron-MOS logic gates

Tadashi Shibata, Tadahiro Ohmi, K. Kotani, 1998 .

Advanced Plasma Processing Equipment without Wafer Surface Damage and Chamber Material Contamination

Tadashi Shibata, Tadahiro Ohmi, Osamu Kamiya, 1990 .

Computing based on the physics of nano devices—A beyond-CMOS approach to human-like intelligent systems

Tadashi Shibata, T. Shibata, 2009 .

A Digital-Pixel-Sensor-Based Global Feature Extraction VLSI for Real-Time Image Recognition

Tadashi Shibata, Hongbo Zhu, 2008 .

Advanced scientific semiconductor processing based on high-precision controlled low-energy ion bombardment

Tadashi Shibata, Tadahiro Ohmi, T. Shibata, 1994 .

Minimizing Wafer Surface Damage and Chamber Material Contamination in New Plasma Processing Equipment

Tadashi Shibata, Tadahiro Ohmi, Osamu Kamiya, 1990 .

Patterning of human dental arch wire blanks using a vector quantization algorithm.

Tadashi Shibata, Kenji Takada, T. Shibata, 2002, The Angle orthodontist.

A Programmable Difference-of-Gaussian Analog Complementary Metal Oxide Semiconductor Image Sensor Operating in the Subthreshold Regime

Tadashi Shibata, Zheye Wang, 2013 .