Kailash Chandra Ray

发表

Application of variational mode decomposition and ABC optimized DAG-SVM in arrhythmia analysis

Sandeep Raj, Kailash Chandra Ray, 2017, 2017 7th International Symposium on Embedded Computing and System Design (ISED).

FPGA implementation of stream cipher using Toeplitz Hash function

Kailash Chandra Ray, Saptadeep Pal, K. K. Soundra Pandian, 2014, 2014 International Conference on Advances in Computing, Communications and Informatics (ICACCI).

Robust Gunshot Features and Its Classification Using Support Vector Machine for Wildlife Protection

Vivek Singh, Kailash Chandra Ray, Somanath Tripathy, 2020 .

High Throughput VLSI Architecture for Blackman Windowing in Real Time Spectral Analysis

Kailash Chandra Ray, Anindya Sundar Dhar, K. C. Ray, 2008, J. Comput..

Area-Efficient Parallel-Prefix Binary Comparator

Kailash Chandra Ray, Amit Kumar Panda, Rakesh Palisetty, 2019, 2019 IEEE International Symposium on Smart Electronic Systems (iSES) (Formerly iNiS).

A Personalized Point-of-Care Platform for Real-Time ECG Monitoring

Sandeep Raj, Kailash Chandra Ray, K. C. Ray, 2018, IEEE Transactions on Consumer Electronics.

FPGA Prototype and Real Time Analysis of Multiuser Variable Rate CI-GO-OFDMA

Kailash Chandra Ray, Rakesh Palisetty, 2018, IEEE Transactions on Instrumentation and Measurement.

ARM Based Implementation of Text-to-Speech (TTS) for Real Time Embedded System

Kailash Chandra Ray, Abdul Rawoof, Kulesh, 2014, 2014 Fifth International Conference on Signal and Image Processing.

Design and ASIC Implementation of a Reconfigurable Fault-Tolerant ALU for Space Applications

Kailash Chandra Ray, Satyam Shukla, 2019, 2019 IEEE International Symposium on Smart Electronic Systems (iSES) (Formerly iNiS).

ARM-based arrhythmia beat monitoring system

Sandeep Raj, Kailash Chandra Ray, G. S. S. Praveen Chand, 2015, Microprocess. Microsystems.

Efficient methodology for electrocardiogram beat classification

Kailash Chandra Ray, Piyush Sharma, K. C. Ray, 2016, IET Signal Process..

Design and Implementation of Quadruple Floating-Point CORDIC

Kailash Chandra Ray, Arun Kumar Singh, Madhav Kumar Singh, 2015, 2015 IEEE International Symposium on Nanoelectronic and Information Systems.

An Efficient VLSI Architecture for Computation of Discrete Fractional Fourier Transform

Kailash Chandra Ray, Anindya Sundar Dhar, M. V. N. V. Prasad, 2018, J. Signal Process. Syst..

An algorithm and architecture for non-recursive pseudorandom sequence generation using sequence folding technique

Kailash Chandra Ray, K. K. Soundra Pandian, 2017 .

Fixed-Point Design of 1024-Point CI-OFDM for DVB-Satellite to Handheld

Kailash Chandra Ray, Rakesh Palisetty, 2018 .

Low Latency Hybrid CORDIC Algorithm

Kailash Chandra Ray, Rohit Shukla, K. C. Ray, 2014, IEEE Transactions on Computers.

Secure OFDM based on Coupled Linear Congruential Generator and its FPGA Prototype

Kailash Chandra Ray, Amit Kumar Panda, Rakesh Palisetty, 2018, 2018 IEEE International Conference on Information Communication and Signal Processing (ICICSP).

CORDIC-based VLSI architecture for real time implementation of flat top window

Vikas Kumar, Preetam Kumar, Kailash Chandra Ray, 2014, Microprocess. Microsystems.

Five decade evolution of feedback shift register: algorithms, architectures and applications

Kailash Chandra Ray, K. K. Soundra Pandian, K. C. Ray, 2015, Int. J. Commun. Networks Distributed Syst..

FPGA Prototype of Low Latency BBS PRNG

Kailash Chandra Ray, Amit Kumar Panda, 2015, 2015 IEEE International Symposium on Nanoelectronic and Information Systems.

ECG Signal Analysis Using DCT-Based DOST and PSO Optimized SVM

Sandeep Raj, Kailash Chandra Ray, K. C. Ray, 2017, IEEE Transactions on Instrumentation and Measurement.

Design and FPGA Prototype of 1024- bit Blum-Blum-Shub PRBG Architecture

Kailash Chandra Ray, Amit Kumar Panda, 2018, 2018 IEEE International Conference on Information Communication and Signal Processing (ICICSP).

A Personalized Arrhythmia Monitoring Platform

Sandeep Raj, Kailash Chandra Ray, K. C. Ray, 2018, Scientific Reports.

Automated recognition of cardiac arrhythmias using sparse decomposition over composite dictionary

Sandeep Raj, Kailash Chandra Ray, K. C. Ray, 2018, Comput. Methods Programs Biomed..

Performance Analysis and FPGA Prototype of Variable Rate GO-OFDMA Baseband Transmission Scheme

Akash Agarwal, Preetam Kumar, Kailash Chandra Ray, 2019, Wirel. Pers. Commun..

CORDIC-based unified VLSI architecture for implementing window functions for real time spectral analysis

Kailash Chandra Ray, Anindya Sundar Dhar, K. C. Ray, 2006 .

Dynamic Hash key-based stream cipher for secure transmission of real time ECG signal

Kailash Chandra Ray, K. K. Soundra Pandian, K. C. Ray, 2016, Secur. Commun. Networks.

CORDIC-Based VLSI Architectures of Running DFT with Refreshing Mechanism

Kailash Chandra Ray, Anindya Sundar Dhar, 2019, J. Signal Process. Syst..

A Coupled Variable Input LCG Method and its VLSI Architecture for Pseudorandom Bit Generation

Kailash Chandra Ray, Amit Kumar Panda, 2020, IEEE Trans. Instrum. Meas..

Sparse representation of ECG signals for automated recognition of cardiac arrhythmias

Sandeep Raj, Kailash Chandra Ray, K. C. Ray, 2018, Expert Syst. Appl..

ASIC Implementation of Low PAPR Multidevice Variable-Rate Architecture for IEEE 802.11ah

Kailash Chandra Ray, Amit Kumar Panda, Rakesh Palisetty, 2021, IEEE Transactions on Instrumentation and Measurement.

Modified Dual-CLCG Method and its VLSI Architecture for Pseudorandom Bit Generation

Kailash Chandra Ray, Amit Kumar Panda, 2019, IEEE Transactions on Circuits and Systems I: Regular Papers.

An Efficient Signal Processing Technique for Automated Myocardial Infarction Detection

Kailash Chandra Ray, Garima Sahu, 2019, 2019 IEEE International Symposium on Smart Electronic Systems (iSES) (Formerly iNiS).

A knowledge-based real time embedded platform for arrhythmia beat classification

Sandeep Raj, Kailash Chandra Ray, K. C. Ray, 2015 .

Development of robust, fast and efficient QRS complex detector: a methodological review

Sandeep Raj, Kailash Chandra Ray, K. C. Ray, 2018, Australasian Physical & Engineering Sciences in Medicine.

Parallel architecture for real time computation of discrete Mellin transform

Kailash Chandra Ray, Anindya Sundar Dhar, 2014, 2014 2nd International Conference on Emerging Technology Trends in Electronics, Communication and Networking.

Cardiac arrhythmia beat classification using DOST and PSO tuned SVM

Sandeep Raj, Kailash Chandra Ray, K. C. Ray, 2016, Comput. Methods Programs Biomed..

Blind Detection and Classification Algorithm for Smart Audio Monitoring System

Kailash Chandra Ray, Somanath Tripathy, K. C. Ray, 2019, 2019 IEEE International Symposium on Smart Electronic Systems (iSES) (Formerly iNiS).

Low-complexity CORDIC-based VLSI design and FPGA prototype of CI-OFDMA system for next-generation

Preetam Kumar, Kailash Chandra Ray, Vikas Kumar, 2016, 2016 IEEE 12th International Colloquium on Signal Processing & Its Applications (CSPA).

FPGA prototyping of energy dispersal and improved error efficiency techniques for DVB-satellite standard

Kailash Chandra Ray, Rakesh Palisetty, Vibhooti Kumar Sinha, 2015, 2015 International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI-SATA).

Multiuser Variable Rate GO-OFDMA Architecture and Its FPGA Prototype

Kailash Chandra Ray, Rakesh Palisetty, 2020, IEEE Systems Journal.

CORDIC-based VLSI architecture for implementing CI-OFDM and its FPGA prototype

Kailash Chandra Ray, Vikas Kumar, Preetam Kumar, 2016, 2016 International Conference on VLSI Systems, Architectures, Technology and Applications (VLSI-SATA).

Single cycle RISC-V micro architecture processor and its FPGA prototype

Ayushi Priyam, Kailash Chandra Ray, Arijit Mondal, 2017, 2017 7th International Symposium on Embedded Computing and System Design (ISED).

Hardware efficient design of Variable Length FFT Processor

Kailash Chandra Ray, Pauline Haddow, Vinay Gautam, 2011, 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems.

Development of Handheld Cardiac Event Monitoring System

Sandeep Raj, Kailash Chandra Ray, Sunny Luthra, 2015 .

High-Speed Area-Efficient VLSI Architecture of Three-Operand Binary Adder

Kailash Chandra Ray, Amit Kumar Panda, Rakesh Palisetty, 2020, IEEE Transactions on Circuits and Systems I: Regular Papers.

A VLSI architecture of CORDIC-based popular windows and its FPGA prototype

Vikas Kumar, Preetam Kumar, Kailash Chandra Ray, 2017, Int. J. High Perform. Syst. Archit..

A comparative study of multivariate approach with neural networks and support vector machines for arrhythmia classification

Sandeep Raj, Kailash Chandra Ray, K. C. Ray, 2015, 2015 International Conference on Energy, Power and Environment: Towards Sustainable Growth (ICEPE).

Design and implementation of dynamic key based stream cipher for cryptographic processor

Kailash Chandra Ray, Saptadeep Pal, K. K. Soundra Pandian, 2015, 2015 3rd International Conference on Signal Processing, Communication and Networking (ICSCN).

A Basis Function for DCT Based Discrete Orthogonal S-Transform

Kailash Chandra Ray, Pritiranjan Khatua, 2019, 2019 IEEE International Symposium on Smart Electronic Systems (iSES) (Formerly iNiS).

CORDIC-Based VLSI Architecture for Implementing Kaiser-Bessel Window in Real Time Spectral Analysis

Kailash Chandra Ray, Anindya Sundar Dhar, K. C. Ray, 2013, Journal of Signal Processing Systems.

Non-singular sequence folding-based pseudorandom key generation algorithm for cryptographic processor

Kailash Chandra Ray, K. K. Soundra Pandian, K. C. Ray, 2015, Secur. Commun. Networks.