Jucemar Monteiro

An analytical timing-driven algorithm for detailed placement

Guilherme Flach, Marcelo de Oliveira Johann, José Luís Almada Güntzel, 2015, 2015 IEEE 6th Latin American Symposium on Circuits & Systems (LASCAS).

A1CSA: An energy-efficient fast adder architecture for cell-based VLSI design

José Luís Almada Güntzel, Luciano Volcan Agostini, Jucemar Monteiro, 2011, 2011 18th IEEE International Conference on Electronics, Circuits, and Systems.

An Optimized Cost Flow Algorithm to Spread Cells in Detailed Placement

Laleh Behjat, Marcelo Johann, Jucemar Monteiro, 2019, ACM Trans. Design Autom. Electr. Syst..

Routing-Aware Incremental Timing-Driven Placement

Mateus Fogaça, Andrew A. Kennings, Guilherme Flach, 2016, 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

Drive Strength Aware Cell Movement Techniques for Timing Driven Placement

Mateus Fogaça, Guilherme Flach, Marcelo de Oliveira Johann, 2016, ISPD.

Hierarchical Add One Carry Select Adder: Um Somador Select-Adder com Cadeia de Carry Logarítmica

Jucemar Monteiro, 2010 .

An Incremental Timing-Driven flow using quadratic formulation for detailed placement

Paulo F. Butzen, Mateus Fogaça, Guilherme Flach, 2015, 2015 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC).

Quadratic timing objectives for incremental timing-driven placement optimization

Mateus Fogaça, Guilherme Flach, Marcelo de Oliveira Johann, 2016, 2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Rsyn: An Extensible Physical Synthesis Framework

Mateus Fogaça, Guilherme Flach, Marcelo de Oliveira Johann, 2017, ISPD.

Algoritmo de posicionamento analítico-detalhado guiado a caminhos críticos

Jucemar Monteiro, 2014 .