Cong Hao

发表

FlowGNN: A Dataflow Architecture for Universal Graph Neural Network Inference via Multi-Queue Streaming

Rishov Sarkar, Stefan Abi-Karam, Yuqiang He, 2022, ArXiv.

Efficient Machine Learning, Compilers, and Optimizations for Embedded Systems

Deming Chen, Yao Chen, Cong Hao, 2022, ArXiv.

A Generic FPGA Accelerator Framework for Ultra-Fast GNN Inference

Rishov Sarkar, Cong Hao, 2022 .

Unsupervised Learning for Combinatorial Optimization with Principled Objective Relaxation

Hang Yang, Nan Wu, Cong Hao, 2022, ArXiv.

Unsupervised Learning for Combinatorial Optimization with Principled Objective Design

Pan Li, Hang Yang, Nan Wu, 2022 .

Compilation and Optimizations for Efficient Machine Learning on Embedded Systems

Deming Chen, Yao Chen, Cong Hao, 2022, 2206.03326.

Enabling Design Methodologies and Future Trends for Edge AI: Specialization and Codesign

Luca Benini, Deming Chen, Jordan Dotzel, 2021, IEEE Design & Test.

Unsupervised Learning for Combinatorial Optimization with Principled Objective Relaxation

Pan Li, Hang Yang, Haoyu Wang, 2022, NeurIPS.

FlowGNN: A Dataflow Architecture for Real-Time Workload-Agnostic Graph Neural Network Inference

Rishov Sarkar, Stefan Abi-Karam, Yuqiang He, 2022, 2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA).

GNNBuilder: An Automated Framework for Generic Graph Neural Network Accelerator Generation, Simulation, and Optimization

Stefan Abi-Karam, Cong Hao, 2023, 2023 33rd International Conference on Field-Programmable Logic and Applications (FPL).

Bottleneck Analysis of Dynamic Graph Neural Network Inference on CPU and GPU

Yihan Jiang, Cong Hao, Hanqiu Chen, 2022, 2022 IEEE International Symposium on Workload Characterization (IISWC).

Adversarial Graph Augmentation to Improve Graph Contrastive Learning pdf

Jennifer Neville, Pan Li, Susheel Suresh, 2021, NeurIPS.

On-FPGA Training with Ultra Memory Reduction: A Low-Precision Tensor Method

Cole Hawkins, Kaiqi Zhang, Cong Hao, 2021, ArXiv.

TION: A LOW-PRECISION TENSOR METHOD

Cole Hawkins, Kaiqi Zhang, Cong Hao, 2021 .

Effective Algorithm-Accelerator Co-design for AI Solutions on Edge Devices

Wen-mei W. Hwu, Deming Chen, W. Hwu, 2020, ACM Great Lakes Symposium on VLSI.

AutoDNNchip: An Automated DNN Chip Predictor and Builder for Both FPGAs and ASICs

Yue Wang, Yang Zhao, Chaojian Li, 2020, FPGA.

SkyNet: a Hardware-Efficient Method for Object Detection and Tracking on Embedded Systems

Wen-mei W. Hwu, Humphrey Shi, Deming Chen, 2019, MLSys.

FPGA/DNN Co-Design: An Efficient Design Methodology for 1oT Intelligence on the Edge

Jinjun Xiong, Yuhong Li, Deming Chen, 2019, 2019 56th ACM/IEEE Design Automation Conference (DAC).

Enabling Flexibility for Sparse Tensor Acceleration via Heterogeneity

Sivasankaran Rajamanickam, Tushar Krishna, Cong Hao, 2022, ArXiv.

3U-EdgeAI: Ultra-Low Memory Training, Ultra-Low Bitwidth Quantization, and Ultra-Low Latency Acceleration

Cong Hao, Cole Hawkins, Zheng Zhang, 2021, ACM Great Lakes Symposium on VLSI.

VecQ: Minimal Loss DNN Model Compression With Vectorized Weight Quantization pdf

Tao Li, Deming Chen, Yao Chen, 2020, IEEE Transactions on Computers.

T-DLA: An Open-source Deep Learning Accelerator for Ternarized DNN Models on Embedded FPGA

Kai Zhang, Deming Chen, Yao Chen, 2019, 2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

The Sixth Visual Object Tracking VOT2018 Challenge Results

Michael Felsberg, Huchuan Lu, Fahad Shahbaz Khan, 2018, ECCV Workshops.

IronMan-Pro: Multiobjective Design Space Exploration in HLS via Reinforcement Learning and Graph Neural Network-Based Modeling

Yuan Xie, Nan Wu, Cong Hao, 2023, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

High-level synthesis performance prediction using GNNs: benchmarking, modeling, and advancing

Pan Li, Hang Yang, Nan Wu, 2022, DAC.

Program-to-Circuit: Exploiting GNNs for Program Representation and Circuit Translation pdf

Cong Hao, Nan Wu, Yuan Xie, 2021, arXiv.org.

A Hybrid GPU + FPGA System Design for Autonomous Driving Cars

Yuhong Li, Deming Chen, Husam Abu-Haimed, 2019, 2019 IEEE International Workshop on Signal Processing Systems (SiPS).

Deep Neural Network Model and FPGA Accelerator Co-Design: Opportunities and Challenges

Deming Chen, Cong Hao, Deming Chen, 2018, 2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

Cloud-DNN: An Open Framework for Mapping DNN Models to Cloud FPGAs

Yao Chen, Jiong He, Deming Chen, 2019, FPGA.

H2H: heterogeneous model to heterogeneous system mapping with computation and communication awareness

Peipei Zhou, J. Hu, A. Jones, 2022, DAC.

Software/Hardware Co-design for Multi-modal Multi-task Learning in Autonomous Systems

Deming Chen, Cong Hao, Deming Chen, 2021, 2021 IEEE 3rd International Conference on Artificial Intelligence Circuits and Systems (AICAS).

EDD: Efficient Differentiable DNN Architecture and Implementation Co-search for Embedded AI Solutions

Jinjun Xiong, Deming Chen, Yao Chen, 2020, 2020 57th ACM/IEEE Design Automation Conference (DAC).

GenGNN: A Generic FPGA Framework for Graph Neural Network Acceleration

Cong Hao, Stefan Abi-Karam, Yuqi He, 2022, ArXiv.

ScaleHLS: Scalable High-Level Synthesis through MLIR pdf

Deming Chen, Stephen Neuendorffer, Cong Hao, 2021, ArXiv.

ScaleHLS: A New Scalable High-Level Synthesis Framework on Multi-Level Intermediate Representation

Stephen Neuendorffer, Cong Hao, Hanchen Ye, 2021, 2022 IEEE International Symposium on High-Performance Computer Architecture (HPCA).

SkyNet: A Champion Model for DAC-SDC on Low Power Object Detection pdf

Jinjun Xiong, Deming Chen, Kyle Rupnow, 2019, ArXiv.

Generic Neural Architecture Search via Regression pdf

Deming Chen, Cong Hao, Jinjun Xiong, 2021, NeurIPS.

Rapid-INR: Storage Efficient CPU-free DNN Training Using Implicit Neural Representation

Hang Yang, Cong Hao, Han-Chen Chen, 2023, ArXiv.

Gamora: Graph Learning based Symbolic Reasoning for Large-Scale Boolean Networks

Cunxi Yu, Nan Wu, Cong Hao, 2023, ArXiv.

µL2Q: An Ultra-Low Loss Quantization Method for DNN Compression

Deming Chen, Yao Chen, Cheng Gong, 2019, 2019 International Joint Conference on Neural Networks (IJCNN).

NAIS: Neural Architecture and Implementation Search and its Applications in Autonomous Driving

Deming Chen, Yao Chen, Wen-mei W. Hwu, 2019, 2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

WinoCNN: Kernel Sharing Winograd Systolic Array for Efficient Convolutional Neural Network Acceleration on FPGAs

Deming Chen, Cong Hao, Xinheng Liu, 2021, 2021 IEEE 32nd International Conference on Application-specific Systems, Architectures and Processors (ASAP).

DGNN-Booster: A Generic FPGA Accelerator Framework For Dynamic Graph Neural Network Inference

Cong Hao, Han-Chen Chen, 2023, 2023 IEEE 31st Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM).

Bottleneck Analysis of Dynamic Graph Neural Network Inference on CPU and GPU

Yihan Jiang, Cong Hao, Han-Chen Chen, 2022, 2022 IEEE International Symposium on Workload Characterization (IISWC).

Rapid-INR: Storage Efficient CPU-Free DNN Training Using Implicit Neural Representation

Hang Yang, Cong Hao, Han-Chen Chen, 2023, 2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD).

AutoDNNchip: An Automated DNN Chip Predictor and Builder for Both FPGAs and ASICs

Pengfei Xu, Deming Chen, Chaojian Li, 2020, FPGA.