S. Kim

48.4: Pre‐Emphasis Driving Method for Large Size and High Resolution TFT‐LCDs

Oh-Kyong Kwon, Yoo‐Chang Sung, Seong-Joong Kim, 2003 .

A Highly Digital VCO-Based ADC Architecture for Current Sensing Applications

Pavan Kumar Hanumolu, Karthikeyan Reddy, Sachin Rao, 2015, IEEE Journal of Solid-State Circuits.

23.1 A 16Mb/s-to-8Gb/s 14.1-to-5.9pJ/b source synchronous transceiver using DVFS and rapid on/off in 65nm CMOS

Ahmed Elkholy, Woo-Seok Choi, Pavan Kumar Hanumolu, 2016, 2016 IEEE International Solid-State Circuits Conference (ISSCC).

A 10-MHz 2–800-mA 0.5–1.5-V 90% Peak Efficiency Time-Based Buck Converter With Seamless Transition Between PWM/PFM Modes

Woo-Seok Choi, Pavan Kumar Hanumolu, Seong Joong Kim, 2018, IEEE Journal of Solid-State Circuits.

12.2 A1.8V 30-to-70MHz 87% peak-efficiency 0.32mm2 4-phase time-based buck converter consuming 3μA/MHz quiescent current in 65nm CMOS

Pavan Kumar Hanumolu, Robert C. N. Pilawa-Podgurski, Qadeer Ahmad Khan, 2015, 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers.

A Calibration-Free Fractional-N Ring PLL Using Hybrid Phase/Current-Mode Phase Interpolation Method

Ahmed Elkholy, Tejasvi Anand, Woo-Seok Choi, 2015, IEEE Journal of Solid-State Circuits.

A 2.4-GHz Super-Regenerative Transceiver With Selectivity-Improving Dual Q-Enhancement Architecture and 102- $\mu \text{W}$ All-Digital FLL

Kang-Yoon Lee, Sang-Gug Lee, Sang-Gug Lee, 2017, IEEE Transactions on Microwave Theory and Techniques.