Peter Gutberlet

Automatic generation of interprocess communication in the PARAGON system

Wolfgang Rosenstiel, Xun Xiong, Peter Gutberlet, 1996, Proceedings Seventh IEEE International Workshop on Rapid System Prototyping. Shortening the Path from Specification to Prototype.

Interface specification and synthesis for VHDL processes

Wolfgang Rosenstiel, Peter Gutberlet, 1993, Proceedings of EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference.

Automatic module allocation in high level synthesis

Wolfgang Rosenstiel, Jens Müller, Heinrich Krämer, 1992, Proceedings EURO-DAC '92: European Design Automation Conference.

CASCH-a scheduling algorithm for 'high level'-synthesis

Wolfgang Rosenstiel, Heinrich Krämer, Peter Gutberlet, 1991, Proceedings of the European Conference on Design Automation..

Fast Bit-Accurate C++ Datatypes For Functional System Verification and Synthesis

Andrés Takach, Peter Gutberlet, Simon Waters, 2004, FDL.

Spezifikation und Synthese aus taktfreien VHDL Verhaltensbeschreibungen

Peter Gutberlet, 1997 .

Timing preserving interface transformations for the synthesis of behavioral VHDL

Wolfgang Rosenstiel, Peter Gutberlet, 1994, EURO-DAC '94.

CASCH - ein Scheduling-Algorithmus für "High-Level"-Synthese

Wolfgang Rosenstiel, Heinrich Krämer, Peter Gutberlet, 1990, Rechnergestützter Entwurf und Architektur mikroelektronischer Systeme.