Suge Yue

发表

Low Power Dissipation SEU-hardened CMOS Latch

Yuanfu Zhao, Yuhong Li, Suge Yue, 2007 .

Single event transients of scan flip-flop and an SET-immune redundant delay filter (RDF)

Liang Wang, Xinyuan Zhao, Suge Yue, 2013, 2013 14th European Conference on Radiation and Its Effects on Components and Systems (RADECS).

The sensitive mapping of memories in microprocessor

Yuanfu Zhao, Suge Yue, Chunqing Yu, 2015 .

A Design of M-LVDS Transmitter IP

Yi Shi, Suge Yue, Yuan-fu Zhao, 2015, ICM 2015.

Analysis of the New Latchup Model for Deep Sub-micron Integrated Circuits

Pan Dong, Suge Yue, Hongchao Zheng, 2011, 2011 IEEE Ninth International Conference on Dependable, Autonomic and Secure Computing.

An Efficient Design of Single Event Transients Tolerance for Logic Circuits

Suge Yue, Yantu Mo, 2008, 4th IEEE International Symposium on Electronic Design, Test and Applications (delta 2008).

Frequency Effect on SEU of D Flip-Flop

Pan Dong, Suge Yue, Long Fan, 2011 .

Frequency Compensation for Multistage Amplifiers Using Active-Feedback Current Buffers

Yuanfu Zhao, Zushu Yan, Suge Yue, 2006, 2006 IEEE North-East Workshop on Circuits and Systems.

A wide input voltage range, output-capacitorless linear voltage regulator in 0.25UM BCD process

Yuanfu Zhao, Suge Yue, Danhui Wang, 2015, 2015 China Semiconductor Technology International Conference.

Design and simulation for three SEU immune latches in a 0.18µm CMOS commercial process

Yuanfu Zhao, Yuhong Li, Suge Yue, 2007 .

Impact of Synthesis Constraints on Error Propagation Probability of Digital Circuits

Bharat L. Bhuva, William H. Robinson, Daniel B. Limbrick, 2011, 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems.

A Low-Jitter 10GHz PLL Based on Adaptive Bandwidth Technique for Muti-Rate Serial Link Data Transmitter

Suge Yue, Jiaqi Liu, Yajiao Liu, 2019, 2019 IEEE 3rd Information Technology, Networking, Electronic and Automation Control Conference (ITNEC).

Highly-scaled SRAM immunity to MNU based on analysis of an induced parasitic bipolar effect

Yuanfu Zhao, Suge Yue, Jiancheng Li, 2010, 2010 Second International Conference on Communication Systems, Networks and Applications.

A Novel Low Temperature Coefficient Band-gap Reference without Resistors

Yujiao Zhao, Bian Qiang, Suge Yue, 2008 .

Analysis and Design of Voltage Controlled Current Source for LDO Frequency Compensation

Yuanfu Zhao, Zushu Yan, Suge Yue, 2005, 2005 IEEE Conference on Electron Devices and Solid-State Circuits.

Single Event Effect Characterization of High Speed Serial JESD204B Data Receiver

Suge Yue, Maoxin Chen, Junze Li, 2019 .

FITVS: A FPGA-Based Emulation Tool For High-Efficiency Hardness Evaluation

Suge Yue, Hongchao Zheng, Long Fan, 2008, 2008 IEEE International Symposium on Parallel and Distributed Processing with Applications.

Design of a novel 12T radiation hardened memory cell tolerant to single event upsets (SEU)

Suge Yue, Chunyan Hu, Shijin Lu, 2017, 2017 2nd IEEE International Conference on Integrated Circuits and Microsystems (ICICM).

A low-voltage CMOS low-dropout regulator with novel capacitor-multiplier frequency compensation

Zushu Yan, Liangguo Shen, Suge Yue, 2008, 2008 IEEE International Symposium on Circuits and Systems.

A 0.996mW 10GHz slicer with 20mV input resolution in 65nm CMOS

Yanan Chen, Fei Shi, Suge Yue, 2016, 2016 China Semiconductor Technology International Conference (CSTIC).

Capacitor-Multiplier Frequency Compensation for Low-Power Multistage Amplifiers

Yuanfu Zhao, Zushu Yan, Liangguo Shen, 2007, 2007 14th IEEE International Conference on Electronics, Circuits and Systems.

A Study on High Density Gate-Oxide Anti-Fuse PROM Memory Cell Program Features

Suge Yue, Shijin Lu, Keqin Yang, 2016 .

A Design of Multi-Phase Clocks Generator for CDR

Yi Shi, Suge Yue, Yuan-fu Zhao, 2016 .

3D simulation of charge collection and SEU of 0.13µm partially depleted SOI SRAM

Liang Wang, Xiaochen Zhang, Suge Yue, 2010, 2010 IEEE International Integrated Reliability Workshop Final Report.

A 8.0Gb/s source-series-terminated transmitter driver with 3 tap FFE for multi-standard applications in 65 nm CMOS

Yanan Chen, Fei Shi, Suge Yue, 2016, 2016 International Conference on Control, Decision and Information Technologies (CoDIT).

New Latch-Up Model for Deep Sub-micron Integrated Circuits

Pan Dong, Suge Yue, Hongchao Zheng, 2011, 2011 IEEE Ninth International Conference on Dependable, Autonomic and Secure Computing.

An SEU-Tolerant Programmable Frequency Divider

Yuanfu Zhao, Liang Wang, Suge Yue, 2007, 8th International Symposium on Quality Electronic Design (ISQED'07).

A Fast-Lock Low-Jitter PLL Based Adaptive Bandwidth Technique

Jiaqi Liu, Suge Yue, Yajiao Liu, 2018 .

ESD device simulation in a pre-Si phase

Suge Yue, Zhiguo Li, 2008, 2008 IEEE International Conference on Electron Devices and Solid-State Circuits.

3D Simulation of transient current and charge collection induced by heavy ion in SOI transistors

Suge Yue, Liang Wang, Xiaochen Zhang, 2010, 2010 IEEE Nanotechnology Materials and Devices Conference.

A Monte Carlo-based control signal generator for single event effetc (SEE) fault injection

Suge Yue, Hongchao Zheng, Long Fan, 2009, 2009 European Conference on Radiation and Its Effects on Components and Systems.

Single event effects on hard-by-design latches

Suge Yue, Liang Wang, Yuanfu Zhao, 2007, 2007 9th European Conference on Radiation and Its Effects on Components and Systems.

SEU and SET of 65 Bulk CMOS Flip-flops and Their Implications for RHBD

Dan Wang, Suge Yue, Hongchao Zheng, 2015, IEEE Transactions on Nuclear Science.

3D Simulation of charge collection and MNU in SEU hardened storage cells

Suge Yue, Yuanfu Zhao, Lin Liu, 2009, 2009 European Conference on Radiation and Its Effects on Components and Systems.