P. Terreni

发表

70-MHz 2- mu m CMOS bit-level systolic array median filter

Roberto Roncella, Roberto Saletti, Pierangelo Terreni, 1993 .

Mixed-Signal Design Space Exploration for Low-Cost, High-Efficiency Digital Audio Amplifiers

Luca Fanucci, Sergio Saponara, Pierangelo Terreni, 2005 .

A DCT systolic chip for digital HDTV

Roberto Roncella, Roberto Saletti, Pierangelo Terreni, 1992 .

Realization of an algorithm for image enhancement

Luca Fanucci, Simone Orcioni, Massimo Conti, 2005 .

Italian National Research Council Network for VLSI Circuit Remote Design

Luca Fanucci, Roberto Roncella, Roberto Saletti, 1996 .

Correlation between thermal and generation recombination noise sources: Analytical and Monte Carlo approaches

L. Reggiani, M. Macucci, B. Pellegrini, 1988 .

Hierarchical Platform for Battery Management System with Active Balancing

Luca Fanucci, Roberto Roncella, Roberto Saletti, 2012 .

Application of a systolic macrocell-based VLSI design style to the design of a single-chip high-performance FIR filter

Roberto Saletti, Pierangelo Terreni, Roberto Roncella, 1991 .

Automatic Synthesis of Cost Effective FFT/IFFT Cores for VLSI OFDM Systems

Luca Fanucci, Sergio Saponara, Pierangelo Terreni, 2008, IEICE Trans. Electron..

Sensor Modeling, Low-Complexity Fusion Algorithms, and Mixed-Signal IC Prototyping for Gas Measures in Low-Emission Vehicles

Luca Fanucci, Sergio Saponara, Pierangelo Terreni, 2011, IEEE Transactions on Instrumentation and Measurement.

Design of a Low-Power VLSI Macrocell for Nonlinear Adaptive Video Noise Reduction

Luca Fanucci, Sergio Saponara, Pierangelo Terreni, 2004, EURASIP J. Adv. Signal Process..

A CMOS readout chip for pixel detectors

P. Terreni, L. Mazzoni, R. Mariani, 1997, 1997 2nd IEEE-CAS Region 8 Workshop on Analog and Mixed IC Design.

A useful application of CMOS ternary logic to the realisation of asynchronous circuits

Roberto Roncella, Roberto Saletti, Riccardo Mariani, 1997, Proceedings 1997 27th International Symposium on Multiple- Valued Logic.

Topological conditions for the unique solvability of linear time‐invariant and time‐varying networks

Pierangelo Terreni, Mario Poletti, M. Poletti, 1987 .

Noise Analysis of Regenerative Comparators for Reconfigurable ADC Architectures

Pierluigi Nuzzo, Geert Van der Plas, Pierangelo Terreni, 2008, IEEE Transactions on Circuits and Systems I: Regular Papers.

Sensor modeling and fusion algorithms for NOx measures towards zero emissions vehicles

Sergio Saponara, Pierangelo Terreni, Antonio Giampà, 2009, 2009 IEEE International Workshop on Robotic and Sensors Environments.

Conditions for the existence and uniqueness of DC solutions of networks containing nonlinear OpAmps with ideal model

Pierangelo Terreni, Maurizio Ciampa, Mario Poletti, 1993, 1993 IEEE International Symposium on Circuits and Systems.

A 10.6mW/0.8pJ power-scalable 1GS/s 4b ADC in 0.18μm CMOS with 5.8GHz ERBW

Liesbet Van der Perre, Pierluigi Nuzzo, Geert Van der Plas, 2006, DAC.

A 250-ps time-resolution CMOS multihit time-to-digital converter for nuclear physics experiments

Roberto Roncella, Roberto Saletti, Pierangelo Terreni, 1999 .

Linear networks and systems depending polynomially on parameters: Stability for large values subject to tolerance errors

Pierangelo Terreni, Maurizio Ciampa, Mario Poletti, 1993, Int. J. Circuit Theory Appl..

An efficient VLSI architecture for real-time additive synthesis of musical signals

Roberto Roncella, Roberto Saletti, Pierangelo Terreni, 1999, IEEE Trans. Very Large Scale Integr. Syst..

Performance estimation of data-flow applications for IP-based system design

A. Sangiovanni-Vincentelli, P. Terreni, A. Ferrari, 1998, 1998 URSI International Symposium on Signals, Systems, and Electronics. Conference Proceedings (Cat. No.98EX167).