Wayne D. Dettloff

A 5 Gb/s Link With Matched Source Synchronous and Common-Mode Clocking Techniques

Yue Lu, Lei Luo, Jared Zerbe, 2011, IEEE Journal of Solid-State Circuits.

A 6.4Gb/s near-ground single-ended transceiver for dual-rank DIMM memory interface systems

Yi Lu, Lei Luo, Barry Daly, 2013, 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers.

A 6.4-Gb/s Near-Ground Single-Ended Transceiver for Dual-Rank DIMM Memory Interface Systems

Yi Lu, Lei Luo, Barry Daly, 2014, IEEE Journal of Solid-State Circuits.

A 32mW 7.4Gb/s protocol-agile source-series-terminated transmitter in 45nm CMOS SOI

Lei Luo, Barry Daly, Teva Stone, 2010, 2010 IEEE International Solid-State Circuits Conference - (ISSCC).

VLSI fuzzy chip and inference accelerator board systems

Hiroyuki Watanabe, Wayne D. Dettloff, K. E. Yount, 1991, [1991] Proceedings of the Twenty-First International Symposium on Multiple-Valued Logic.

The Omnitest system: a no-generate, no-compile, interactive test methodology

Wayne D. Dettloff, Melodie D. Tebbs, 1989, Proceedings. 'Meeting the Tests of Time'., International Test Conference.

A 6.4/3.2/1.6 Gb/s low power interface with all digital clock multiplier for on-the-fly rate switching

Masum Hossain, Jared Zerbe, Barry Daly, 2012, Proceedings of the IEEE 2012 Custom Integrated Circuits Conference.