Fabio Campi

发表

The Dream Digital Signal Processor Architecture, Programming Model and Application Mapping

Claudio Mucci, Davide Rossi, Fabio Campi, 2009 .

Design of digital modules for capacitive proximity sensing system applications

Fabio Campi, Fan Xia, Behraad Bahreyni, 2016, 2016 IEEE Canadian Conference on Electrical and Computer Engineering (CCECE).

RTL-to-layout implementation of an embedded coarse grained architecture for dynamically reconfigurable computing in systems-on-chip

Roberto Guerrieri, Davide Rossi, Fabio Campi, 2009, 2009 International Symposium on System-on-Chip.

A FPGA Implementation of An Open-Source Floating-Point Computation System

Jari Nurmi, Davide Rossi, Claudio Mucci, 2005, 2005 International Symposium on System-on-Chip.

Approximate computing for complexity reduction in timing synchronization

Jari Nurmi, Fabio Campi, Roberto Airoldi, 2014, EURASIP J. Adv. Signal Process..

MORPHEUS: A heterogeneous dynamically reconfigurable platform for designing highly complex embedded systems

Ulrich Heinkel, Dimitrios Kritharidis, Jürgen Becker, 2013, TECS.

A cycle-accurate ISS for a dynamically reconfigurable processor architecture

Claudio Mucci, Fabio Campi, Alberto Fazzi, 2005, 19th IEEE International Parallel and Distributed Processing Symposium.

MORPHEUS: Exploitation of Reconfiguration for Increased Run-Time Flexibility and Self-Adaptive Capabilities in Future SoCs

Philippe Millet, Paul Brelet, Fabio Campi, 2011 .

Design and implementation of a reconfigurable heterogeneous multiprocessor SoC

Roberto Guerrieri, Andrea Lodi, Claudio Mucci, 2006, IEEE Custom Integrated Circuits Conference 2006.

Reconfigurable IO Module

Roberto Guerrieri, Andrea Lodi, Claudio Mucci, 2005 .

A dynamically adaptive DSP for heterogeneous reconfigurable platforms

Andrea Lodi, Claudio Mucci, Fabio Campi, 2007, 2007 Design, Automation & Test in Europe Conference & Exhibition.

Reconfigurable hardware: The holy grail of matching performance with programming productivity

Jari Nurmi, Fabio Campi, Fabio Garzia, 2008, 2008 International Conference on Field Programmable Logic and Applications.

Improving Electro-Magnetic Interference of Embedded Systems Through Jittered-Delay Desynchronization

Luciano Lavagno, Davide Pandini, Fabio Campi, 2010, J. Low Power Electron..

A reconfigurable FPU as IP component for SoCs

Jari Nurmi, Fabio Campi, Claudio Brunelli, 2004, 2004 International Symposium on System-on-Chip, 2004. Proceedings..

Design methodology for low-power embedded microprocessors

Davide Pandini, Fabio Campi, Valentino Liberali, 2013, 2013 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS).

A Heterogeneous Digital Signal Processor for Dynamically Reconfigurable Computing

Roberto Guerrieri, Davide Rossi, Fabio Campi, 2010, IEEE Journal of Solid-State Circuits.

Feasibility of Support Vector Machine gesture classification on a wearable embedded device

Dong Yang, Carlo Menon, Fabio Campi, 2016, 2016 IEEE Canadian Conference on Electrical and Computer Engineering (CCECE).

The MORPHEUS Data Communication and Storage Infrastructure

Marcello Coppola, Riccardo Locatelli, Jürgen Becker, 2009 .

A Stream Register FileUnitforReconfigurable Processors

Claudio Mucci, Fabio Campi, A. Deledda, 2006 .

A multi-core signal processor for heterogeneous reconfigurable computing

Davide Rossi, Claudio Mucci, Fabio Campi, 2009, 2009 International Symposium on System-on-Chip.

A C-based algorithm development flow for a reconfigurable processor architecture

Andrea Lodi, Claudio Mucci, Fabio Campi, 2003, Proceedings. 2003 International Symposium on System-on-Chip (IEEE Cat. No.03EX748).

Exploiting body biasing for leakage reduction: A case study

Davide Pandini, Davide Rossi, Fabio Campi, 2013, 2013 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

A low-power system-on-chip for the documentation of road accidents

Roberto Guerrieri, Fabio Campi, Roberto Canegallo, 2005, IEEE Transactions on Circuits and Systems for Video Technology.

A dataflow control unit for C-to-configurable pipelines compilation flow

Andrea Lodi, Claudio Mucci, Fabio Campi, 2004, 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines.

Routing architecture for multi-context FPGAs

Andrea Lodi, Fabio Campi, Luca Ciccarelli, 2004, FPGA '04.

A flexible LUT-based carry chain for FPGAs

Andrea Lodi, Fabio Campi, Carlo Chiesa, 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

Design of a Flexible, Energy Efficient (Auto)Correlator Block for Timing Synchronization

Jari Nurmi, Fabio Campi, Roberto Airoldi, 2014, 2014 IEEE Computer Society Annual Symposium on VLSI.

Session 3 Overview Microprocessor Technologies

Fabio Campi, Sonia Leon, 2009 .

Implementation of AES/Rijndael on a dynamically reconfigurable architecture

Claudio Mucci, Fabio Campi, Luca Vanzolini, 2007, 2007 Design, Automation & Test in Europe Conference & Exhibition.

A system level IP integration methodology for fast SOC design

Fabio Campi, Claudio Brunelli, Massimo Bocchi, 2003, Proceedings. 2003 International Symposium on System-on-Chip (IEEE Cat. No.03EX748).

A reconfigurable heterogeneous multiprocessor System on Chip

Roberto Guerrieri, Andrea Lodi, Claudio Mucci, 2006 .

Programming Tools for Reconfigurable Processors

Jari Nurmi, Claudio Mucci, Fabio Campi, 2007 .

Design of a HW/SW Communication Infrastructure for a Heterogeneous Reconfigurable Processor

Riccardo Locatelli, Jürgen Becker, Michael Hübner, 2008, 2008 Design, Automation and Test in Europe.

A pipelined configurable gate array for embedded processors

Andrea Lodi, Fabio Campi, Mario Toma, 2003, FPGA '03.

A VLIW processor with reconfigurable instruction set for embedded applications

Roberto Guerrieri, Fabio Campi, Andrea Cappelli, 2003 .

Power-Shaping Configurable Microprocessors for IoT Devices

Fabio Campi, 2017 .

A XiRisc-based SoC for embedded DSP applications

Roberto Guerrieri, Andrea Lodi, Claudio Mucci, 2004, Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571).

Implementation of Parallel LFSR-based Applications on an Adaptive DSP featuring a Pipelined Configurable Gate Array

Claudio Mucci, Fabio Campi, Luca Ciccarelli, 2008, 2008 Design, Automation and Test in Europe.

A system-on-a-programmable-chip for real-time control of massively parallel arrays of biosensors and actuators

Fabio Campi, Marco Tartagni, Nicolò Manaresi, 2003, The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications, 2003. Proceedings..

Sustainable (re-) configurable solutions for the high volume SoC market

Claudio Mucci, Fabio Campi, Luca Ciccarelli, 2008, 2008 IEEE International Symposium on Parallel and Distributed Processing.

Decoder-based multi-context interconnect architecture

Andrea Lodi, Fabio Campi, Luca Ciccarelli, 2003, IEEE Computer Society Annual Symposium on VLSI, 2003. Proceedings..

A stream register file unit for reconfigurable processors

Claudio Mucci, Fabio Campi, Antonio Deledda, 2006, 2006 IEEE International Symposium on Circuits and Systems.

A case-study on multimedia applications for the XiRisc reconfigurable processor

Claudio Mucci, Fabio Campi, Massimo Bocchi, 2006, 2006 IEEE International Symposium on Circuits and Systems.

The MORPHEUS Heterogeneous Dynamically Reconfigurable Platform

Davide Rossi, Sami Yehia, Philippe Millet, 2011, International Journal of Parallel Programming.

An Interconnect Strategy for a Heterogeneous, Reconfigurable SoC

Marcello Coppola, Riccardo Locatelli, Jürgen Becker, 2008, IEEE Design & Test of Computers.

Application Space Exploration of a Heterogeneous Run-Time Configurable Digital Signal Processor

Roberto Guerrieri, Davide Rossi, Claudio Mucci, 2013, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A reconfigurable processor architecture and software development environment for embedded systems

Luciano Lavagno, Roberto Guerrieri, Fabio Campi, 2003, Proceedings International Parallel and Distributed Processing Symposium.

Decoder-based interconnect structure for multi-context FPGAs

Andrea Lodi, Fabio Campi, Luca Ciccarelli, 2003 .

The Dream Digital Signal Processor

Davide Rossi, Claudio Mucci, Fabio Campi, 2009 .

Design space exploration of an open-source, IP-reusable, scalable floating-point engine for embedded applications

Jari Nurmi, Tapani Ahonen, Davide Rossi, 2008, J. Syst. Archit..

Compact Buffered Routing Architecture

Andrea Lodi, Fabio Campi, Luca Ciccarelli, 2004, FPL.

Keynote and Plenary Talks

Fadi J. Kurdahi, Andrew B. Kahng, Fabio Campi, 2012, ISVLSI 2012.

A heterogeneous digital signal processor implementation for dynamically reconfigurable computing

Davide Rossi, Fabio Campi, Simone Spolzino, 2009, 2009 IEEE Custom Integrated Circuits Conference.

Design and Implementation of a Power-aware FFT Core for OFDM-based DSA-enabled Cognitive Radios

Jari Nurmi, Fabio Campi, Roberto Airoldi, 2015, J. Signal Process. Syst..

Introducing IC reliability elements in digital circuits and systems design education

Fabio Campi, Josh Ancill, 2016, 2016 IEEE International Symposium on Circuits and Systems (ISCAS).

F6: Signal and power integrity for SoCs

Ram Krishnamurthy, Vladimir Stojanovic, Fabio Campi, 2010, 2010 IEEE International Solid-State Circuits Conference - (ISSCC).

Run-Time Reconfigurable Processors

Claudio Mucci, Fabio Campi, 2007 .

XiSystem: a XiRisc-based SoC with a reconfigurable IO module

Roberto Guerrieri, Andrea Lodi, Claudio Mucci, 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..