Luca Ciccarelli

发表

The Dream Digital Signal Processor Architecture, Programming Model and Application Mapping

Claudio Mucci, Davide Rossi, Fabio Campi, 2009 .

3D Capacitive Interconnections with Mono- and Bi-Directional Capabilities

Roberto Guerrieri, Luca Ciccarelli, Roberto Canegallo, 2007, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

Reconfigurable IO Module

Roberto Guerrieri, Andrea Lodi, Claudio Mucci, 2005 .

A dynamically adaptive DSP for heterogeneous reconfigurable platforms

Andrea Lodi, Claudio Mucci, Fabio Campi, 2007, 2007 Design, Automation & Test in Europe Conference & Exhibition.

Combining low-leakage techniques for FPGA routing design

Andrea Lodi, Luca Ciccarelli, Roberto Giansante, 2005, FPGA '05.

Low leakage circuit design for FPGAs

Andrea Lodi, Luca Ciccarelli, Roberto Canegallo, 2004, Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571).

Routing architecture for multi-context FPGAs

Andrea Lodi, Fabio Campi, Luca Ciccarelli, 2004, FPGA '04.

A reconfigurable heterogeneous multiprocessor System on Chip

Roberto Guerrieri, Andrea Lodi, Claudio Mucci, 2006 .

3D Capacitive Interconnections for High Speed Interchip Communication

Roberto Guerrieri, Luca Ciccarelli, Roberto Canegallo, 2007, 2007 IEEE Custom Integrated Circuits Conference.

A Low-Power Routing Architecture Optimized for Deep Sub-Micron FPGAs

Andrea Lodi, Claudio Mucci, Luca Ciccarelli, 2006, IEEE Custom Integrated Circuits Conference 2006.

Implementation of Parallel LFSR-based Applications on an Adaptive DSP featuring a Pipelined Configurable Gate Array

Claudio Mucci, Fabio Campi, Luca Ciccarelli, 2008, 2008 Design, Automation and Test in Europe.

Sustainable (re-) configurable solutions for the high volume SoC market

Claudio Mucci, Fabio Campi, Luca Ciccarelli, 2008, 2008 IEEE International Symposium on Parallel and Distributed Processing.

Decoder-based multi-context interconnect architecture

Andrea Lodi, Fabio Campi, Luca Ciccarelli, 2003, IEEE Computer Society Annual Symposium on VLSI, 2003. Proceedings..

Decoder-based interconnect structure for multi-context FPGAs

Andrea Lodi, Fabio Campi, Luca Ciccarelli, 2003 .

The Dream Digital Signal Processor

Davide Rossi, Claudio Mucci, Fabio Campi, 2009 .

Compact Buffered Routing Architecture

Andrea Lodi, Fabio Campi, Luca Ciccarelli, 2004, FPL.

A Multi-Context Pipelined Array for Embedded Systems

Andrea Lodi, Claudio Mucci, Luca Ciccarelli, 2006, 2006 International Conference on Field Programmable Logic and Applications.

XiSystem: a XiRisc-based SoC with a reconfigurable IO module

Roberto Guerrieri, Andrea Lodi, Claudio Mucci, 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..

An embedded reconfigurable datapath for SoC

Andrea Lodi, Claudio Mucci, Luca Ciccarelli, 2005, 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'05).