P. Ouyang

发表

Spintronic Processing Unit Within Voltage-Gated Spin Hall Effect MRAMs

He Zhang, Bi Wu, Erya Deng, 2019, IEEE Transactions on Nanotechnology.

An Energy-Efficient Reconfigurable Processor for Binary-and Ternary-Weight Neural Networks With Flexible Data Bit Width

Leibo Liu, Shouyi Yin, Shaojun Wei, 2019, IEEE Journal of Solid-State Circuits.

Parallelization of Computing-Intensive Tasks of SIFT Algorithm on a Reconfigurable Architecture System

Hui Gao, Leibo Liu, Shouyi Yin, 2013, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

Fast and low-power behavior analysis on vehicles using smartphones

Shouyi Yin, Peng Ouyang, Xiaoqing Xu, 2017, 2017 6th International Symposium on Next Generation Electronics (ISNE).

An Ultra-Low Power Binarized Convolutional Neural Network-Based Speech Recognition Processor With On-Chip Self-Learning

Shouyi Yin, Dandan Song, Peng Ouyang, 2019, IEEE Transactions on Circuits and Systems I: Regular Papers.

Scale Invariant Feature Transform algorithm based on a reconfigurable architecture system

Hui Gao, Leibo Liu, Shouyi Yin, 2012, 2012 8th International Conference on Computing Technology and Information Management (NCM and ICNIT).

A Computing Efficient Hardware Architecture for Sparse Deep Neural Network Computing

Youguang Zhang, Shouyi Yin, Shaojun Wei, 2018, 2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

A High Energy Efficient Reconfigurable Hybrid Neural Network Processor for Deep Learning Applications

Leibo Liu, Shouyi Yin, Shaojun Wei, 2018, IEEE Journal of Solid-State Circuits.

Deep Convolutional Neural Network Architecture With Reconfigurable Computation Patterns

Leibo Liu, Shouyi Yin, Shaojun Wei, 2017, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A fast and power efficient architecture to parallelize LSTM based RNN for cognitive intelligence applications

Shouyi Yin, Shaojun Wei, Peng Ouyang, 2017, 2017 54th ACM/EDAC/IEEE Design Automation Conference (DAC).

A High Throughput Acceleration for Hybrid Neural Networks With Efficient Resource Management on FPGA

Leibo Liu, Shouyi Yin, Shaojun Wei, 2019, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

A Multilevel Cell STT-MRAM-Based Computing In-Memory Accelerator for Binary Convolutional Neural Network

Youguang Zhang, Shouyi Yin, Shaojun Wei, 2018, IEEE Transactions on Magnetics.

High-performance video content recognition with long-term recurrent convolutional network for FPGA

Deming Chen, Zuofu Cheng, Kyle Rupnow, 2017, 2017 27th International Conference on Field Programmable Logic and Applications (FPL).

Transformer with Bidirectional Decoder for Speech Recognition

Shouyi Yin, Xi Chen, Songyang Zhang, 2020, INTERSPEECH.

PAGAN: A Phase-Adapted Generative Adversarial Networks for Speech Enhancement

Shouyi Yin, Peng Ouyang, Zihang Jiang, 2020, ICASSP 2020 - 2020 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP).

AEPE: An area and power efficient RRAM crossbar-based accelerator for deep CNNs

Leibo Liu, Shouyi Yin, Shaojun Wei, 2017, 2017 IEEE 6th Non-Volatile Memory Systems and Applications Symposium (NVMSA).

Small-Footprint Keyword Spotting with Graph Convolutional Network

Shouyi Yin, Xi Chen, Peng Ouyang, 2019, 2019 IEEE Automatic Speech Recognition and Understanding Workshop (ASRU).

Local Enhancement and Bidirectional Feature Refinement Network for Single-Shot Detector

Shu Zhan, Pengxiang Ouyang, Jiaqi Zhu, 2021, Cognitive Computation.

Parana: A Parallel Neural Architecture Considering Thermal Problem of 3D Stacked Memory

Cong Xu, Yuan Xie, Jishen Zhao, 2019, IEEE Transactions on Parallel and Distributed Systems.

Concurrent Detection and Recognition of Individual Object Based on Colour and p-SIFT Features

Leibo Liu, Shouyi Yin, Shaojun Wei, 2013, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

Fast Traffic Sign Recognition with a Rotation Invariant Binary Pattern Based Feature

Yike Guo, Leibo Liu, Shouyi Yin, 2015, Sensors.

An Ultra-High Energy-Efficient Reconfigurable Processor for Deep Neural Networks with Binary/Ternary Weights in 28NM CMOS

Leibo Liu, Shouyi Yin, Shaojun Wei, 2018, 2018 IEEE Symposium on VLSI Circuits.

A 141 UW, 2.46 PJ/Neuron Binarized Convolutional Neural Network Based Self-Learning Speech Recognition Processor in 28NM CMOS

Leibo Liu, Shouyi Yin, Shaojun Wei, 2018, 2018 IEEE Symposium on VLSI Circuits.

Energy Management on Battery-Powered Coarse-Grained Reconfigurable Platforms

Leibo Liu, Shouyi Yin, Shaojun Wei, 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A High Precision Feature Based on LBP and Gabor Theory for Face Recognition

Shouyi Yin, Wei Xia, Peng Ouyang, 2013, Sensors.