Michael Bucher

A 5Gb/s link with clock edge matching and embedded common mode clock for low power interfaces

Jared Zerbe, Barry Daly, Lei Luo, 2010, 2010 Symposium on VLSI Circuits.

A 5 Gb/s Link With Matched Source Synchronous and Common-Mode Clocking Techniques

Yue Lu, Lei Luo, Jared Zerbe, 2011, IEEE Journal of Solid-State Circuits.

A 6.4Gb/s near-ground single-ended transceiver for dual-rank DIMM memory interface systems

Yi Lu, Lei Luo, Barry Daly, 2013, 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers.

A 4.3GB/s mobile memory interface with power-efficient bandwidth scaling

Brian Leibowitz, Michael Bucher, John Poulton, 2009, 2009 Symposium on VLSI Circuits.

Characterization of a low-power 6.4 Gbps DDR DIMM memory interface system

Yi Lu, Lei Luo, Michael Bucher, 2013, 2013 IEEE 63rd Electronic Components and Technology Conference.

A 6.4-Gb/s Near-Ground Single-Ended Transceiver for Dual-Rank DIMM Memory Interface Systems

Yi Lu, Lei Luo, Barry Daly, 2014, IEEE Journal of Solid-State Circuits.

FreePDK: An Open-Source Variation-Aware Design Kit

Paul D. Franzon, Michael Bucher, Fred Love, 2007, 2007 IEEE International Conference on Microelectronic Systems Education (MSE'07).

Modulares Abwärmerückgewinnungssystem mit elektrischer Leistungsabgabe

Michael Bucher, Andreas Pfeifer, Hannes Marlok, 2019, MTZ - Motortechnische Zeitschrift.

A 4.3 GB/s Mobile Memory Interface With Power-Efficient Bandwidth Scaling

Michael Bucher, John G. Eyles, John Poulton, 2010, IEEE Journal of Solid-State Circuits.

eWHR box approach: from component development to system testing in the real world and synergies with future drive train

Michael Bucher, Jana Mertens, Hannes Marlok, 2019 .