Valentina Ciriani

发表

Enforcing Confidentiality and Data Visibility Constraints: An OBDD Approach

Sabrina De Capitani di Vimercati, Pierangela Samarati, Valentina Ciriani, 2011, DBSec.

Efficient optimal greedy algorithms for room allocation

Valentina Ciriani, Nadia Pisanti, Anna Bernasconi, 2001 .

2-SPP Approximate Synthesis for Error Tolerant Applications

Valentina Ciriani, Anna Bernasconi, 2014, 2014 17th Euromicro Conference on Digital System Design.

Minimization of EP-SOPs via Boolean relations

Tiziano Villa, Valentina Ciriani, Anna Bernasconi, 2013, 2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration (VLSI-SoC).

Minimization of P-circuits using boolean relations

Tiziano Villa, Valentina Ciriani, Anna Bernasconi, 2013, 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Zero-Suppressed Binary Decision Diagrams Resilient to Index Faults

Valentina Ciriani, Anna Bernasconi, 2014, IFIP TCS.

Enhancing logic synthesis of switching lattices by generalized Shannon decomposition methods

Tiziano Villa, Valentina Ciriani, Anna Bernasconi, 2018, Microprocess. Microsystems.

Weighted don't cares

Valentina Ciriani, Anna Bernasconi, Gabriella Trucco, 2012 .

Keep a Few: Outsourcing Data While Maintaining Confidentiality

Sushil Jajodia, Sabrina De Capitani di Vimercati, Stefano Paraboschi, 2009, ESORICS.

EXOR Projected Sum of Products

Roberto Cordone, Valentina Ciriani, Anna Bernasconi, 2006, 2006 IFIP International Conference on Very Large Scale Integration.

Locally free substitutions are not so free : an open problem in sequence alignment

Fabrizio Luccio, Valentina Ciriani, Nadia Pisanti, 2004 .

Synthesis of complemented circuits

Tiziano Villa, Robert K. Brayton, Valentina Ciriani, 2018 .

Computing with nano-crossbar arrays: Logic synthesis and fault tolerance

Mehdi Baradaran Tahoori, Valentina Ciriani, Mustafa Altun, 2017, Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017.

Testability of SPP Three-Level Logic Networks in Static Fault Models

Rolf Drechsler, Valentina Ciriani, Anna Bernasconi, 2006, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Radiation-tolerant standard cell synthesis using double-rail redundant approach

Valentina Ciriani, Gabriella Trucco, Valentino Liberali, 2014, 2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS).

On Projecting Sums of Products

Roberto Cordone, Valentina Ciriani, Anna Bernasconi, 2008, 2008 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools.

Composition of Switching Lattices and Autosymmetric Boolean Function Synthesis

Valentina Ciriani, Anna Bernasconi, Gabriella Trucco, 2017, 2017 Euromicro Conference on Digital System Design (DSD).

Exploiting Quantum Gates in Secure Computation

Ernesto Damiani, Stelvio Cimato, Valentina Ciriani, 2017, 2017 Euromicro Conference on Digital System Design (DSD).

Fun at a Department Store: Data Mining Meets Switching Theory

Fabrizio Luccio, Valentina Ciriani, Linda Pagli, 2010, FUN.

Implicit Test of Regularity for Not Completely Specified Boolean Functions

Fabrizio Luccio, Valentina Ciriani, Linda Pagli, 2002, IWLS.

Autosymmetric and Dimension Reducible Multiple-Valued Functions

Valentina Ciriani, Anna Bernasconi, 2014, J. Multiple Valued Log. Soft Comput..

A multiple valued logic approach for the synthesis of garbled circuits

Ernesto Damiani, Stelvio Cimato, Valentina Ciriani, 2017, 2017 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC).

Logic Minimization and Testability of 2SPP-P-Circuits

Tiziano Villa, Valentina Ciriani, Anna Bernasconi, 2009, 2009 12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools.

Boolean Minimization of Projected Sums of Products via Boolean Relations

Tiziano Villa, Valentina Ciriani, Anna Bernasconi, 2019, IEEE Transactions on Computers.

Room allocation: a polynomial subcase of the quadratic assignment problem

Valentina Ciriani, Nadia Pisanti, Anna Bernasconi, 2004, Discret. Appl. Math..

Synthesis of SPP three-level logic networks using affine spaces

Valentina Ciriani, 2003, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Synthesis of integer multipliers in sum of pseudoproducts form

Fabrizio Luccio, Valentina Ciriani, Linda Pagli, 2003, Integr..

Three-level logic minimization based on function regularities

Fabrizio Luccio, Valentina Ciriani, Linda Pagli, 2003, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

A data structure for a sequence of string accesses in external memory

Fabrizio Luccio, S. Muthukrishnan, Valentina Ciriani, 2007, TALG.

SOP restructuring by exploiting don't cares

Tiziano Villa, Valentina Ciriani, Anna Bernasconi, 2013, Microprocess. Microsystems.

Synthesis of P-circuits for logic restructuring

Tiziano Villa, Valentina Ciriani, Anna Bernasconi, 2012, Integr..

Logic minimization using exclusive OR gates

Valentina Ciriani, V. Ciriani, 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).

Computing the full quotient in bi-decomposition by approximation

Tiziano Villa, Valentina Ciriani, Anna Bernasconi, 2020, 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Compact and Testable Circuits for Regular Functions

Valentina Ciriani, Anna Bernasconi, 2011, ARCS Workshops.

On the Construction of Small Fully Testable Circuits with Low Depth

Rolf Drechsler, Görschwin Fey, Valentina Ciriani, 2007, 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools (DSD 2007).

Logic synthesis and testing techniques for switching nano-crossbar arrays

Dan Alexandrescu, Mehdi Baradaran Tahoori, Lorena Anghel, 2017, Microprocess. Microsystems.

2-SPP : a practical trade-off between SP and SPP synthesis

Valentina Ciriani, Anna Bernasconi, V. Ciriani, 2002 .

On decomposing Boolean functions via extended cofactoring

Tiziano Villa, Valentina Ciriani, Anna Bernasconi, 2009, 2009 Design, Automation & Test in Europe Conference & Exhibition.

k -Anonymous Data Mining: A Survey

Sabrina De Capitani di Vimercati, Pierangela Samarati, Valentina Ciriani, 2008, Privacy-Preserving Data Mining.

Efficient Minimization of Fully Testable 2-SPP Networks

Tiziano Villa, Rolf Drechsler, Valentina Ciriani, 2006, Proceedings of the Design Automation & Test in Europe Conference.

Self-adjusting Data Structures for External Memory String Access

Fabrizio Luccio, Valentina Ciriani, Paolo Ferragina, 2001 .

Biconditional-BDD Ordering for Autosymmetric Functions

Valentina Ciriani, Anna Bernasconi, Gabriella Trucco, 2015, 2015 Euromicro Conference on Digital System Design.

Projected Don't Cares

Tiziano Villa, Valentina Ciriani, Anna Bernasconi, 2012, 2012 15th Euromicro Conference on Digital System Design.

Testability of Switching Lattices in the Stuck at Fault Model

Valentina Ciriani, Anna Bernasconi, Luca Frontini, 2018, 2018 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC).

The optimization of kEP-SOPs: Computational complexity, approximability and experiments

Roberto Cordone, Valentina Ciriani, Anna Bernasconi, 2008, TODE.

Logic Minimization and Testability of 2-SPP Networks

Tiziano Villa, Rolf Drechsler, Valentina Ciriani, 2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Synthesis of Autosymmetric Functions in a New Three-Level Form

Fabrizio Luccio, Valentina Ciriani, Linda Pagli, 2007, Theory of Computing Systems.

DRedSOP: Synthesis of a New Class of Regular Functions

Valentina Ciriani, Anna Bernasconi, 2006, 9th EUROMICRO Conference on Digital System Design (DSD'06).

Dimension-reducible Boolean functions based on affine spaces

Valentina Ciriani, Anna Bernasconi, 2011, TODE.

Three-level logic synthesis : algebraic approach and minimization algorithms

Valentina Ciriani, 2003 .

Theory of privacy and anonymity

Sabrina De Capitani di Vimercati, Pierangela Samarati, Valentina Ciriani, 2010 .

On the Construction of Small Fully Testable Circuits with Low Depth

Rolf Drechsler, Görschwin Fey, Valentina Ciriani, 2007, DSD.

Fault Mitigation of Switching Lattices under the Stuck-At-Fault Model

Elena I. Vatajelu, Lorena Anghel, Valentina Ciriani, 2019, 2019 IEEE Latin American Test Symposium (LATS).

Using Flexibility in P-Circuits by Boolean Relations

Tiziano Villa, Valentina Ciriani, Anna Bernasconi, 2015, IEEE Transactions on Computers.

Autosymmetric Multiple-Valued Functions: Theory and Spectral Characterization

Valentina Ciriani, Anna Bernasconi, 2011, 2011 41st IEEE International Symposium on Multiple-Valued Logic.

Synthesis on switching lattices of Dimension-reducible Boolean functions

Valentina Ciriani, Anna Bernasconi, Gabriella Trucco, 2016, 2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC).

Compact DSOP and Partial DSOP Forms

Fabrizio Luccio, Valentina Ciriani, Linda Pagli, 2013, Theory of Computing Systems.

On the error resilience of ordered binary decision diagrams pdf

Valentina Ciriani, Anna Bernasconi, Lorenzo Lago, 2015, Theor. Comput. Sci..

Stuck-At-Fault Testability of SPP Three-Level Logic Forms

Rolf Drechsler, Valentina Ciriani, Anna Bernasconi, 2003, VLSI-SoC.

Logic synthesis and testability of D-reducible functions

Valentina Ciriani, Anna Bernasconi, 2010, 2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip.

Fragmentation Design for Efficient Query Execution over Sensitive Distributed Databases

Sushil Jajodia, Sabrina De Capitani di Vimercati, Stefano Paraboschi, 2009, 2009 29th IEEE International Conference on Distributed Computing Systems.

Integrated Synthesis Methodology for Crossbar Arrays

Dan Alexandrescu, Elena I. Vatajelu, Lorena Anghel, 2018, 2018 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH).

Logic Synthesis of EXOR Projected Sum of Products

Roberto Cordone, Valentina Ciriani, Anna Bernasconi, 2006, VLSI-SoC.

Synthesis and Performance Optimization of a Switching Nano-Crossbar Computer

Dan Alexandrescu, Mehdi Baradaran Tahoori, Lorena Anghel, 2016, 2016 Euromicro Conference on Digital System Design (DSD).

Enforcing Confidentiality Constraints on Sensitive Databases with Lightweight Trusted Clients

Sushil Jajodia, Sabrina De Capitani di Vimercati, Stefano Paraboschi, 2009, DBSec.

Fast three-level logic minimization based on autosymmetry

Fabrizio Luccio, Valentina Ciriani, Linda Pagli, 2002, DAC '02.

SEPP: a New Compact Three-Level Logic Form

Valentina Ciriani, Anna Bernasconi, 2010 .

Testability of SPP Three-Level Logic Networks

Rolf Drechsler, Valentina Ciriani, Anna Bernasconi, 2003, VLSI-SOC.

Index-Resilient Zero-Suppressed BDDs: Definition and Operations

Valentina Ciriani, Anna Bernasconi, 2016, TODE.

Bi-Decomposition Using Boolean Relations

Tiziano Villa, Robert K. Brayton, Valentina Ciriani, 2015, 2015 Euromicro Conference on Digital System Design.

A Comparison between Two Logic Synthesis Forms from Digital Switching Noise Viewpoint

Valentina Ciriani, Gabriella Trucco, Valentino Liberali, 2008, PATMOS.

An Approximation Algorithm for Generalized EXOR Projected Sum of Products

Roberto Cordone, Valentina Ciriani, Anna Bernasconi, 2008 .

An OBDD approach to enforce confidentiality and visibility constraints in data publishing

Sabrina De Capitani di Vimercati, Pierangela Samarati, Valentina Ciriani, 2012, J. Comput. Secur..

Microdata Protection

Sabrina De Capitani di Vimercati, Pierangela Samarati, Valentina Ciriani, 2007, Encyclopedia of Cryptography and Security.

Exploiting Regularities for Boolean Function Synthesis

Fabrizio Luccio, Valentina Ciriani, Linda Pagli, 2004, Theory of Computing Systems.

Fragmentation and Encryption to Enforce Privacy in Data Storage

Sushil Jajodia, Sabrina De Capitani di Vimercati, Stefano Paraboschi, 2007, ESORICS.

An approximation algorithm for cofactoring-based synthesis

Tiziano Villa, Valentina Ciriani, Anna Bernasconi, 2011, GLSVLSI '11.

Composition of switching lattices for regular and for decomposed functions

Valentina Ciriani, Anna Bernasconi, Gabriella Trucco, 2018, Microprocess. Microsystems.

An approximation algorithm for fully testable kEP-SOP networks

Roberto Cordone, Valentina Ciriani, Anna Bernasconi, 2007, GLSVLSI '07.

Weighted don't cares in logic synthesis

Valentina Ciriani, Anna Bernasconi, Gabriella Trucco, 2014 .

Logic Synthesis for Switching Lattices by Decomposition with P-Circuits

Tiziano Villa, Valentina Ciriani, Anna Bernasconi, 2016, 2016 Euromicro Conference on Digital System Design (DSD).

Selective data outsourcing for enforcing privacy

Sushil Jajodia, Sabrina De Capitani di Vimercati, Stefano Paraboschi, 2011, J. Comput. Secur..

Combining fragmentation and encryption to protect privacy in data storage

Sushil Jajodia, Sabrina De Capitani di Vimercati, Stefano Paraboschi, 2010, TSEC.

A Boolean Heuristic for Disjoint SOP Synthesis

Tiziano Villa, Valentina Ciriani, Anna Bernasconi, 2021, 2021 24th Euromicro Conference on Digital System Design (DSD).

Autosymmetry of Incompletely Specified Functions

Valentina Ciriani, Anna Bernasconi, V. Ciriani, 2021, 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE).

A New Heuristic for DSOP Minimization

Fabrizio Luccio, Valentina Ciriani, Linda Pagli, 2008 .

A New Approach to Three-Level Logic Synthesis

Valentina Ciriani, 2002 .

The characterization of the sub-pseudocubes of a pseudocube

Valentina Ciriani, V. Ciriani, 2000 .

Logic synthesis by signal-driven decomposition

Tiziano Villa, Valentina Ciriani, Anna Bernasconi, 2011 .