Jawar Singh

发表

Pseudo parallel architecture for AES with error correction

Dhiraj K. Pradhan, Jimson Mathew, Yi Xin Su, 2008, 2008 IEEE International SOC Conference.

Design and analysis of high performance MEMS capacitive pressure sensor for TPMS

Jawar Singh, Anil Sharma, 2013, 2013 International Conference on Control, Automation, Robotics and Embedded Systems (CARE).

Improved dual sided doped memristor: modelling and applications

Jawar Singh, Komal Singh, Anup Shrivastava, 2014 .

A wideband LNA design based on body bias suitable for low voltage and low power application

Jawar Singh, Manoj Singh Parihar, Sachin Agrawal, 2014 .

Fault Tolerant Reversible Finite Field Arithmetic Circuits

Dhiraj K. Pradhan, Jimson Mathew, Jawar Singh, 2008, 2008 14th IEEE International On-Line Testing Symposium.

Single Event Upset Detection and Correction

Dhiraj K. Pradhan, Jimson Mathew, Jawar Singh, 2007, 10th International Conference on Information Technology (ICIT 2007).

A subthreshold single ended I/O SRAM cell design for nanometer CMOS technologies

Dhiraj K. Pradhan, Jimson Mathew, Saraju P. Mohanty, 2008, 2008 IEEE International SOC Conference.

Introduction to SRAM

Dhiraj K. Pradhan, Saraju P. Mohanty, Jawar Singh, 2013 .

Single Ended Static Random Access Memory for Low-Vdd, High-Speed Embedded Systems

Dhiraj K. Pradhan, Jimson Mathew, Saraju P. Mohanty, 2009, 2009 22nd International Conference on VLSI Design.

Electrical characteristics and short channel performance comparison of different gate junctionless transistors

Jawar Singh, P. N. Kondekar, Chitrakant Sahu, 2013, 2013 International Conference on Control, Automation, Robotics and Embedded Systems (CARE).

A Triple-Mode Sigma-Delta Modulator Design for Wireless Standards

Jimson Mathew, Jawar Singh, Babita R. Jose, 2007, 10th International Conference on Information Technology (ICIT 2007).

Robust power aware SRAM bitcell designs

Jawar Singh, 2009 .

Single Event Upset Detection and Correction

Dhiraj K. Pradhan, Jimson Mathew, Jawar Singh, 2007 .

SiGe Source Charge Plasma TFET for Biosensing Applications

Jawar Singh, Chitrakant Sahu, Nawaz Shafi, 2017, 2017 IEEE International Symposium on Nanoelectronic and Information Systems (iNIS).

Secure Multi-key Generation Using Ring Oscillator Based Physical Unclonable Function

Saraju P. Mohanty, Elias Kougianos, Jawar Singh, 2016, 2016 IEEE International Symposium on Nanoelectronic and Information Systems (iNIS).

Hardware-Software Co-design Approach for Deep Learning Inference

Jimson Mathew, Jawar Singh, Debdeep Paul, 2019, 2019 7th International Conference on Smart Computing & Communications (ICSCC).

Statistical DOE-ILP based power-performance-process (P3) optimization of nano-CMOS SRAM

Dhiraj K. Pradhan, Saraju P. Mohanty, Elias Kougianos, 2012, Integr..

Realization of efficient RF energy harvesting circuits employing different matching technique

Jawar Singh, Manoj Singh Parihar, Sachin Agrawal, 2014, Fifteenth International Symposium on Quality Electronic Design.

Single-Ended SRAM Bitcell Design

Dhiraj K. Pradhan, Saraju P. Mohanty, Jawar Singh, 2013 .

Simplified drain current model for pinch-off double gate junctionless transistor

Jawar Singh, Chitrakant Sahu, P. Swami, 2014 .

Investigation of ultra-thin BOX junctionless transistor at channel length of 20 nm

Jawar Singh, P. N. Kondekar, Chitrakant Sahu, 2013, 2013 IEEE International Conference of Electron Devices and Solid-state Circuits.

IEEE International Conference on VLSI Design

Saraju P. Mohanty, Jimson Mathew, Jawar Singh, 2009 .

A low power and high gain CMOS LNA for UWB applications in 90 nm CMOS process

Jawar Singh, Sunil Kumar Pandey, 2015, Microelectron. J..

A novel Si-Tunnel FET based SRAM design for ultra low-power 0.3V VDD applications

Dhiraj K. Pradhan, Narayanan Vijaykrishnan, Jawar Singh, 2010, 2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC).

Fault tolerant bit parallel finite field multipliers using LDPC codes

Dhiraj K. Pradhan, Jimson Mathew, Jawar Singh, 2008, 2008 IEEE International Symposium on Circuits and Systems.

Dual-sided doped memristor and it's SPICE modelling for improved electrical properties

Jawar Singh, Anup Shrivastava, Jawar Singh, 2014, Fifteenth International Symposium on Quality Electronic Design.

Dopingless Transistor Based Hybrid Oscillator Arbiter Physical Unclonable Function

Saraju P. Mohanty, Elias Kougianos, Jawar Singh, 2017, 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

Robust SRAM Designs and Analysis

Dhiraj K. Pradhan, Saraju P. Mohanty, Jawar Singh, 2012 .

NBTI and Its Effect on SRAM

Dhiraj K. Pradhan, Saraju P. Mohanty, Jawar Singh, 2013 .

Memristor Crossbar-Based Pattern Recognition Circuit Using Perceptron Learning Rule

Muhammad Khalid, Jawar Singh, Jawar Singh, 2016, 2016 IEEE International Symposium on Nanoelectronic and Information Systems (iNIS).

Extended Base Schottky-Collector Bipolar Charge Plasma Transistor

Jawar Singh, Lokesh Kumar Bramhane, Jawar Singh, 2015, 2015 IEEE International Symposium on Nanoelectronic and Information Systems.

A highly reliable NBTI Resilient 6T SRAM cell

Jawar Singh, N. Vijaykrishnan, 2013, Microelectron. Reliab..

Proposal of Heterogate Technique for Performance Enhancement of DM-TFET

Jawar Singh, Chaitanya Maradana, Jawar Singh, 2016, 2016 IEEE International Symposium on Nanoelectronic and Information Systems (iNIS).

Failure analysis for ultra low power nano-CMOS SRAM under process variations

Dhiraj K. Pradhan, Jimson Mathew, Saraju P. Mohanty, 2008, 2008 IEEE International SOC Conference.

SRAM Cells for Embedded Systems

Jawar Singh, Balwinder Raj, Jawar Singh, 2012 .

Reconfigurable Robust Hybrid Oscillator Arbiter PUF for IoT Security Based on DL-FET

Saraju P. Mohanty, Elias Kougianos, Jawar Singh, 2017, 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

Process variation immune dopingless dynamically reconfigurable FET

Jawar Singh, Saurabh Bhaskar, 2015, 2015 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC).

Process variation tolerant 9T SRAM bitcell design

Saraju P. Mohanty, G. K. Reddy, Jawar Singh, 2012, Thirteenth International Symposium on Quality Electronic Design (ISQED).

A highly linear RF mixer using gate-all-around junctionless transistor

Jawar Singh, Sunil Pandey, Chitrakant Sahu, 2017 .

Compact Behavioral Modeling and Time Dependent Performance Degradation Analysis of Junction and Doping Free Transistors

Saraju P. Mohanty, Elias Kougianos, Jawar Singh, 2016, 2016 IEEE International Symposium on Nanoelectronic and Information Systems (iNIS).

Performance Enhancement of Dopingless Tunnel-FET Based on Ge-Source with High-k

Jawar Singh, Kanchan Cecil, 2015, 2015 IEEE International Symposium on Nanoelectronic and Information Systems.

A Triple-Mode Sigma-Delta Modulator Design for Wireless Standards

Jimson Mathew, Jawar Singh, B. R. Jose, 2007 .

Energy and Area Aware Digital Fingerprint Generator Using Intrinsic Randomness

Jawar Singh, Pramod Kumar Tiwari, Sandeepkumar Pandey, 2019 .

A single ended 6T SRAM cell design for ultra-low-voltage applications

Dhiraj K. Pradhan, Saraju P. Mohanty, Jawar Singh, 2008, IEICE Electron. Express.

A 0.1dB NF, 2GHz low power CMOS low noise amplifier

Jawar Singh, Sachin Agrawal, Sunil Kumar Pandey, 2013, 2013 International Conference on Control, Automation, Robotics and Embedded Systems (CARE).

In-memory Implementation of On-chip Trainable and Scalable ANN for AI/ML Applications pdf

Bharat Gupta, Jawar Singh, Abhash Kumar, 2020, ArXiv.

Dual sided doped memristor and it's mathematical modelling

Jawar Singh, Anup Shrivastava, Jawar Singh, 2013, 2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS).

Investigating the impact of NBTI on different power saving cache strategies

Dhiraj K. Pradhan, Narayanan Vijaykrishnan, Jawar Singh, 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).

A nano-CMOS process variation induced read failure tolerant SRAM cell

Dhiraj K. Pradhan, Jimson Mathew, Saraju P. Mohanty, 2008, 2008 IEEE International Symposium on Circuits and Systems.

IEEE International System On Chip Conference (SOCC’ 2008)

Jimson Mathew, Jawar Singh, Pradhan Dhiraj, 2008 .

Modeling and simulation of variable thickness based stepped MEMS cantilever designs for biosensing and pull-in voltage optimization

Jawar Singh, Pavan Kumar Kankar, Deep Kishore Parsediya, 2014, 18th International Symposium on VLSI Design and Test.

Linearly separable pattern classification using memristive crossbar circuits

Jawar Singh, Komal Singh, Chitrakant Sahu, 2014, Fifteenth International Symposium on Quality Electronic Design.

Notice of Violation of IEEE Publication PrinciplesA wideband LNA design based on body bias suitable for low voltage and low power application

Jawar Singh, Sachin Agrawal, Sunil Kumar Pandey, 2014, 2014 IEEE International Conference on Electronics, Computing and Communication Technologies (CONECCT).

Single ended 6T SRAM with isolated read-port for low-power embedded systems

Dhiraj K. Pradhan, Jimson Mathew, Saraju P. Mohanty, 2009, 2009 Design, Automation & Test in Europe Conference & Exhibition.

2-Port SRAM Bitcell Design

Dhiraj K. Pradhan, Saraju P. Mohanty, Jawar Singh, 2013 .

A 2-port 6T SRAM bitcell design with multi-port capabilities at reduced area overhead

Dhiraj K. Pradhan, Saraju P. Mohanty, Jawar Singh, 2010, 2010 11th International Symposium on Quality Electronic Design (ISQED).

Design Metrics of SRAM Bitcell

Dhiraj K. Pradhan, Saraju P. Mohanty, Jawar Singh, 2013 .

An Efficient RF Energy Harvester with Tuned Matching Circuit

Jawar Singh, Sachin Agrawal, Pravin Neminath Kondekar, 2013, VDAT.

Memristor based unbalanced ternary logic gates

Jawar Singh, Muhammad Khalid, Jawar Singh, 2016 .

Impact of Channel Hot Carrier Effect in Junction-and Doping-Free Devices and Circuits

Saraju P. Mohanty, Jawar Singh, Meena Panchore, 2016, IEEE Transactions on Electron Devices.

Symmetric bipolar charge-plasma transistor with extruded base for enhanced performance

Jawar Singh, Lokesh Kumar Bramhane, Jawar Singh, 2015 .

Temperature sensitivity analysis of dopingless charge-plasma transistor

Jawar Singh, Chitrakant Sahu, Chitrakant Sahu, 2016 .

A 0.6 V, low-power and high-gain ultra-wideband low-noise amplifier with forward-body-bias technique for low-voltage operations

Jawar Singh, Sunil Pandey, Jawar Singh, 2015 .

Characteristics of gate inside junctionless transistor with channel length and doping concentration

Jawar Singh, Anup Shrivastava, Chitrakant Sahu, 2013, 2013 IEEE International Conference of Electron Devices and Solid-state Circuits.

Device and circuit performance analysis of double gate junctionless transistors at L g = 18 nm

Jawar Singh, Chitrakant Sahu, Chitrakant Sahu, 2014 .

Static and Quasi-Static Drain Current Modeling of Tri-Gate Junctionless Transistor With Substrate Bias-Induced Effects

Jawar Singh, Deepti Gola, Satyabrata Jit, 2019, IEEE Transactions on Electron Devices.

PVT-Aware Design of Dopingless Dynamically Configurable Tunnel FET

Jawar Singh, Chitrakant Sahu, Avinash Lahgere, 2015, IEEE Transactions on Electron Devices.

Design and performance projection of symmetric bipolar charge-plasma transistor on SOI

Jawar Singh, Chitrakant Sahu, Chitrakant Sahu, 2014 .

Influence of Germanium source on dopingless tunnel-FET for improved analog/RF performance

Jawar Singh, Kanchan Cecil, Jawar Singh, 2017 .

Potential Benefits and Sensitivity Analysis of Dopingless Transistor for Low Power Applications

Jawar Singh, Chitrakant Sahu, Chitrakant Sahu, 2015, IEEE Transactions on Electron Devices.

Charge-Plasma Based Process Variation Immune Junctionless Transistor

Jawar Singh, Chitrakant Sahu, Chitrakant Sahu, 2014, IEEE Electron Device Letters.

3-D Simulation of Junction- and Doping-Free Field-Effect Transistor Under Heavy Ion Irradiation

Jawar Singh, Meena Panchore, Jawar Singh, 2018, IEEE Transactions on Device and Materials Reliability.

Subthreshold Analog/RF performance estimation of doping-less DGFET for ULP applications

Jawar Singh, Chitrakant Sahu, Anup Kumar, 2014, 2014 IEEE 2nd International Conference on Emerging Electronics (ICEE).