Yukihiko Shimazu

A built-in self-test for ADC and DAC in a single-chip speech CODEC

Narumi Sakashita, Takeshi Tokuda, Toru Kengaku, 1993, Proceedings of IEEE International Test Conference - (ITC).

A Built-In Self-Test for ADC and DAC in a Single-Chip Speech CODEC (Special Section on Analog Circuit Techniques for System-on-Chip Integration)

Takeshi Tokuda, Eiichi Teraoka, Ikuo Yasui, 1997 .

A 50 MHz 24 b floating-point DSP

Osamu Tomisawa, Toru Kengaku, Eiichi Teraoka, 1989, IEEE International Solid-State Circuits Conference, 1989 ISSCC. Digest of Technical Papers.

A 2 V 250 MHz VLIW Multimedia Processor

Akira Yamada, Edgar Holmann, Toyohiko Yoshida, 1998 .

A macrocell approach for VLSI processor design

Narumi Sakashita, Takio Ohno, Takeshi Tokuda, 1988, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Built-in self-test in a 24 bit floating point digital signal processor

Narumi Sakashita, Takeshi Tokuda, Toru Kengaku, 1990, Proceedings. International Test Conference 1990.

2V 250MHz Multimedia Processor Design

Akira Yamada, Toyohiko Yoshida, Yukihiko Shimazu, 1997 .

educing Branch Penalty in erscaler Processor

Toyohiko Yoshida, Yukihiko Shimazu, Mamoru Sakamoto, 1996 .