D. Appenzeller

PowerPC 970 in 130 nm and 90 nm technologies

C. Lichtenau, T. Pfluger, J. Heaslip, 2004, 2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519).

A low-power RISC microprocessor using dual PLLs in a 0.13 /spl mu/m SOI technology with copper interconnect and low-k BEOL dielectric

S. Geissler, P. Sandon, N. Rohrer, 2002, 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315).