Yajun Ha

发表

Analysis and design of energy-efficient data-dependent SRAM

Yajun Ha, Ang Li, Yi Wang, 2017, 2017 IEEE 12th International Conference on ASIC (ASICON).

Design of Seamless Protocol Switching Layer for Voice Over Internet Protocol (Voip) That Switches Between Bluetooth and Ieee 802.11

Yajun Ha, Yung Han Tan, Arun Krishnan Thampi, 2005, Int. J. Softw. Eng. Knowl. Eng..

Energy-Efficient Arbitrary Precision Multi-Bit Multiplication with Bi-Serial In/Near Memory Computing

Yajun Ha, Yuqi Wang, Jian Chen, 2020, ISCAS.

Correlation ratio based volume image registration on GPUs

Yajun Ha, Henk Corporaal, Ang Li, 2015, Microprocess. Microsystems.

ParaFRo: A hybrid parallel FPGA router using fine grained synchronization and partitioning

Yajun Ha, Akash Kumar, Chin Hau Hoo, 2016, 2016 26th International Conference on Field Programmable Logic and Applications (FPL).

Reconfiguring Three-Dimensional Processor Arrays for Fault-Tolerance: Hardness and Heuristic Algorithms

Yi Wang, Yajun Ha, Guiyuan Jiang, 2015, IEEE Transactions on Computers.

A Branch Target Instruction Prefetching Technique for Improved Performance

Yajun Ha, Roy Paily, Prashanth Reddy Gade, 2008 .

Analytical Two-Level Near Threshold Cache Exploration for Low Power Biomedical Applications

Yajun Ha, Yun Liang, Tulika Mitra, 2018, ACA.

Iterative Probabilistic Performance Prediction for Multi-Application Multiprocessor Systems

Yajun Ha, Henk Corporaal, Akash Kumar, 2010, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Optimizing energy efficiency of CNN-based object detection with dynamic voltage and frequency scaling

Yajun Ha, Jiaxuan Wu, Jiale Zhang, 2020 .

A Low Active Leakage and High Reliability Phase Change Memory (PCM) Based Non-Volatile FPGA Storage Element

Yajun Ha, Yong Lian, Akash Kumar, 2014, IEEE Transactions on Circuits and Systems I: Regular Papers.

Communication-aware application mapping and scheduling for NoC-based MPSoCs

Yajun Ha, Bharadwaj Veeravalli, Heng Yu, 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

High throughput and resource efficient AES encryption/decryption for SANs

Yajun Ha, Yi Wang, Yi (Estelle) Wang, 2016, 2016 IEEE International Symposium on Circuits and Systems (ISCAS).

Conclusions and Open Problems

Yajun Ha, Henk Corporaal, Bart Mesman, 2011 .

A Performance and Area Efficient ASIP for Higher-Order DPA-Resistant AES

Yajun Ha, Yi Wang, 2014, IEEE Journal on Emerging and Selected Topics in Circuits and Systems.

Area Efficient Box Filter Acceleration by Parallelizing with Optimized Adder Tree

Yajun Ha, Xinzhe Liu, Fupeng Chen, 2019, 2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

A DFA-Resistant and Masked PRESENT with Area Optimization for RFID Applications

Yajun Ha, Yi Wang, Yi (Estelle) Wang, 2017, ACM Trans. Embed. Comput. Syst..

Building a Virtual Framework for Networked Reconfigurable Hardware and Software Objects

Hugo De Man, Yajun Ha, Patrick Schaumont, 2004, The Journal of Supercomputing.

Corrections to "Generalized Hyperbolic CORDIC and Its Logarithmic and Exponential Computation With Arbitrary Fixed Base"

Yajun Ha, Yuxuan Wang, Zhongfeng Wang, 2019, IEEE Trans. Very Large Scale Integr. Syst..

ParaLaR: A parallel FPGA router based on Lagrangian relaxation

Yajun Ha, Akash Kumar, Chin Hau Hoo, 2015, 2015 25th International Conference on Field Programmable Logic and Applications (FPL).

Power-aware FPGA technology mapping for programmable-VT architectures (abstract only)

Yajun Ha, Wei Ting Loke, Yajun Ha, 2012, FPGA '12.

A directional coarse-grained power gated FPGA switch box and power gating aware routing algorithm

Yajun Ha, Akash Kumar, Chin Hau Hoo, 2013, 2013 23rd International Conference on Field programmable Logic and Applications.

An Embedded System to Support Tele-Medical Activity

Yajun Ha, Jia Hui Ng, Chaur Lih Tan, 2005, Int. J. Softw. Eng. Knowl. Eng..

Generalized Hyperbolic CORDIC and Its Logarithmic and Exponential Computation With Arbitrary Fixed Base

Yajun Ha, Yuxuan Wang, Siyuan Chen, 2019, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Design of a high speed pseudo-random bit sequence based time resolved single photon counter on FPGA

Yajun Ha, Nanguang Chen, Shakith Fernando, 2008, 2008 International Conference on Field Programmable Logic and Applications.

Energy Efficiency Optimization of FPGA-based CNN Accelerators with Full Data Reuse and VFS

Yajun Ha, Heng Yu, Weixiong Jiang, 2019, 2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Challenges and future trends for embedded security in electric vehicular communications

Jun Li, Yajun Ha, Yi Wang, 2015, 2015 IEEE 11th International Conference on ASIC (ASICON).

Multiple Use-cases System Design

Yajun Ha, Henk Corporaal, Bart Mesman, 2011 .

Interference-Minimized Multipath Routing with Congestion Control in Wireless Sensor Network for Multimedia Streaming

Yajun Ha, Chen Khong Tham, Jenn Yue Teo, 2007, MILCOM 2007 - IEEE Military Communications Conference.

TRISHUL: A single-pass optimal two-level inclusive data cache hierarchy selection process for real-time MPSoCs

Yajun Ha, Qiang Wu, Akash Kumar, 2013, 2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC).

Multimedia Multiprocessor Systems

Yajun Ha, Henk Corporaal, Akash Kumar, 2010 .

B*-tree based variability-aware floorplanning

Yajun Ha, Shefali Srivastava, Wenjuan Zhang, 2010, 2010 IEEE Asia Pacific Conference on Circuits and Systems.

Probabilistic Performance Prediction

Yajun Ha, Henk Corporaal, Bart Mesman, 2011 .

Multimedia Multiprocessor Systems: Analysis, Design and Management

Yajun Ha, Henk Corporaal, Akash Kumar, 2010 .

An Optimized Logarithmic Converter With Equal Distribution of Relative Errors

Yajun Ha, Mengyao Zhu, Chengcun Gu, 2016, IEEE Transactions on Circuits and Systems II: Express Briefs.

The Optimization of Interconnection Networks in FPGAs

Yajun Ha, Xiaolei Chen, Yajun Ha, 2010, Dynamically Reconfigurable Architectures.

DVFS-Based Quality Maximization for Adaptive Applications With Diminishing Return

Yajun Ha, Bharadwaj Veeravalli, Hesham El-Sayed, 2021, IEEE Transactions on Computers.

Multiprocessor System Design and Synthesis

Yajun Ha, Henk Corporaal, Bart Mesman, 2011 .

Guest Editorial Special Issue on the 2020 ISICAS: A CAS Journal Track Symposium

Yajun Ha, Edoardo Bonizzoni, 2020, IEEE Trans. Circuits Syst. II Express Briefs.

Development of a Design Framework for Platform-Independent Networked Reconfiguration of Software and Hardware

Rudy Lauwereins, Hugo De Man, Yajun Ha, 2001, FPL.

Performance and security-enhanced fuzzy vault scheme based on ridge features for distorted fingerprints

Yajun Ha, Yi Wang, Renfa Li, 2015, IET Biom..

Accurate run-time performance prediction for multi-application multiprocessor systems

Yajun Ha, Henk Corporaal, Bart Mesman, 2008 .

A hardware virtual machine for networked reconfiguration

Hugo De Man, Yajun Ha, Patrick Schaumont, 2000, Proceedings 11th International Workshop on Rapid System Prototyping. RSP 2000. Shortening the Path from Specification to Prototype (Cat. No.PR00668).

An architecture and timing-driven routing algorithm for area-efficient FPGAs with time-multiplexed interconnects

Yajun Ha, Xiaolei Chen, Hanyu Liu, 2008, 2008 International Conference on Field Programmable Logic and Applications.

FPGA-based SHA-3 acceleration on a 32-bit processor via instruction set extension

Youhua Shi, Yajun Ha, Yi Wang, 2015, 2015 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC).

An optimized design for serial-parallel finite field multiplication over GF(2m) based on all-one polynomials

Yajun Ha, Chiou-Yng Lee, Pramod Kumar Meher, 2009, 2009 Asia and South Pacific Design Automation Conference.

A heterogeneous platform with GPU and FPGA for power efficient high performance computing

Yajun Ha, Qiang Wu, Ang Li, 2014, 2014 International Symposium on Integrated Circuits (ISIC).

An FPGA-Based Cloud System for Massive ECG Data Analysis

Yajun Ha, Meikang Qiu, Yongxin Zhu, 2017, IEEE Transactions on Circuits and Systems II: Express Briefs.

Criticality-based routing for FPGAS with reverse body bias switch box architectures

Yajun Ha, Wenfeng Zhao, Wei Ting Loke, 2013, 2013 23rd International Conference on Field programmable Logic and Applications.

sFPGA2 - A scalable GALS FPGA architecture and design methodology

Yajun Ha, Bharadwaj Veeravalli, Xiaolei Chen, 2009, 2009 International Conference on Field Programmable Logic and Applications.

Analyzing composability of applications on MPSoC platforms

Yajun Ha, Henk Corporaal, Bart D. Theelen, 2008, J. Syst. Archit..

Improved chaff point generation for vault scheme in bio-cryptosystems

Yajun Ha, Yi Wang, Renfa Li, 2013, IET Biom..

Statistical noise margin estimation for sub-threshold combinational circuits

Yajun Ha, Henk Corporaal, Yu Pu, 2008, 2008 Asia and South Pacific Design Automation Conference.

sFPGA — A scalable switch based FPGA architecture and design methodology

Yajun Ha, Xiaolei Chen, Shakith Fernando, 2008, 2008 International Conference on Field Programmable Logic and Applications.

Design of networked reconfigurable encryption engine

Yajun Ha, Shakith Fernando, 2005, 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'05).

Iterative Probabilistic Performance Prediction for

Yajun Ha, Henk Corporaal, Akash Kumar, 2010 .

A Multi-Application Mapping Framework for Network-on-Chip Based MPSoC: An FPGA Implementation Case Study

Yajun Ha, Yingmin Wang, Guolei Zhu, 2009, ERSA.

Parallel Discord Discovery

Yajun Ha, Yongxin Zhu, Gillian Dobbie, 2016, PAKDD.

A Probabilistic Approach to Model Resource Contention for Performance Estimation of Multi-featured Media Devices

Yajun Ha, Henk Corporaal, Bart D. Theelen, 2007, 2007 44th ACM/IEEE Design Automation Conference.

Performance-cost analyses software for H.264 Forward/Inverse Integer Transform

Yajun Ha, Thinh M. Le, Binh P. Nguyen, 2010, Proceedings of 2010 21st IEEE International Symposium on Rapid System Protyping.

Quality Estimation and Optimization of Adaptive Stereo Matching Algorithms for Smart Vehicles

Yajun Ha, Heng Yu, Fupeng Chen, 2020, ACM Trans. Embed. Comput. Syst..

Quality Optimization of Resilient Applications under Temperature Constraints

Jing Wang, Yajun Ha, Heng Yu, 2017, Conf. Computing Frontiers.

Using Multiple Paths in NoCs for Guaranteed Resource Allocation and Improved Best Effort Performance in NoCs.

Yajun Ha, Henk Corporaal, I Ovadia, 2005 .

AxC-CS: Approximate Computing for Hardware Efficient Compressed Sensing Encoder Design

Yajun Ha, Wenfeng Zhao, Biao Sun, 2019, 2019 32nd IEEE International System-on-Chip Conference (SOCC).

FPGA based Rekeying for cryptographic key management in Storage Area Network

Yajun Ha, Yi Wang, 2013, 2013 23rd International Conference on Field programmable Logic and Applications.

A Universal Method of Linear Approximation With Controllable Error for the Efficient Implementation of Transcendental Functions

Yinghuan Shi, Yajun Ha, Yang Gao, 2020, IEEE Transactions on Circuits and Systems I: Regular Papers.

Message from the general chair and program co-chairs

Yajun Ha, Hideharu Amano, Yoshiki Yamaguchi, 2013 .

Area-Efficient Distributed Arithmetic Optimization via Heuristic Decomposition and In-Memroy Computing

Yajun Ha, Wenfeng Zhao, Jian Chen, 2019, 2019 IEEE 13th International Conference on ASIC (ASICON).

High Speed Video Processing Using Fine-Grained Processing on FPGA Platform

Yajun Ha, Akash Kumar, Zhi Ping Ang, 2013, 2013 IEEE 21st Annual International Symposium on Field-Programmable Custom Computing Machines.

An automated, efficient and static bit-width optimization methodology towards maximum bit-width-to-error tradeoff with affine arithmetic model

Yajun Ha, Yu Pu, Yajun Ha, 2006, Asia and South Pacific Conference on Design Automation, 2006..

Dynamic Scheduling of Imprecise-Computation Tasks on Real-Time Embedded Multiprocessors

Yajun Ha, Bharadwaj Veeravalli, Heng Yu, 2013, 2013 IEEE 16th International Conference on Computational Science and Engineering.

A Hardware Pipeline with High Energy and Resource Efficiency for FMM Acceleration

Yajun Ha, Meikang Qiu, Yongxin Zhu, 2018, ACM Trans. Embed. Comput. Syst..

Vt balancing and device sizing towards high yield of sub-threshold static logic gates

Yajun Ha, Henk Corporaal, Yu Pu, 2007, Proceedings of the 2007 international symposium on Low power electronics and design (ISLPED '07).

AES architectures for minimum-energy operation and silicon demonstration in 65nm with lowest energy per encryption

Massimo Alioto, Yajun Ha, Wenfeng Zhao, 2015, 2015 IEEE International Symposium on Circuits and Systems (ISCAS).

A Hilbert curve-based delay fault characterization method for FPGAs

Yajun Ha, Wenjuan Zhang, 2011, 2011 IEEE International Symposium of Circuits and Systems (ISCAS).

A New CMOS Buffer Amplifier Design Used in Low Voltage MEMS Interface Circuits

Yajun Ha, Meng Li, Ai Qun Liu, 2001 .

Parallel dataflow execution for sequential programs on reconfigurable hybrid MPSoCs

Yajun Ha, Chao Wang, Xuehai Zhou, 2012, 2012 International Conference on Field-Programmable Technology.

An Area-Efficient Timing-Driven Routing Algorithm for Scalable FPGAs with Time-Multiplexed Interconnects

Yajun Ha, Xiaolei Chen, Hanyu Liu, 2008, 2008 16th International Symposium on Field-Programmable Custom Computing Machines.

A Power and Cluster-Aware Technology Mapping and Clustering Scheme for Dual-VT FPGAs

Yajun Ha, Wenfeng Zhao, Wei Ting Loke, 2012, 2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops & PhD Forum.

An ultra-low-energy/frame multi-standard JPEG co-processor in 65nm CMOS with sub/near-threshold power supply

Yajun Ha, Henk Corporaal, Yu Pu, 2009, 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.

The architecture and placement algorithm for a uni-directional routing based 3D FPGA

Xin Liu, Yajun Ha, Heng Yu, 2013, 2013 International Conference on Field-Programmable Technology (FPT).

DVFS-Based Scrubbing Scheduling for Reliability Maximization on Parallel Tasks in SRAM-based FPGAs

Yajun Ha, Rui Li, Heng Yu, 2020, 2020 57th ACM/IEEE Design Automation Conference (DAC).

Dynamic scheduling of imprecise-computation tasks in maximizing QoS under energy constraints for embedded systems

Yajun Ha, Bharadwaj Veeravalli, Heng Yu, 2008, 2008 Asia and South Pacific Design Automation Conference.

Interference-Minimized Multipath Routing with Congestion Control in Wireless Sensor Network for High-Rate Streaming

Yajun Ha, Chen-Khong Tham, Jenn-Yue Teo, 2008, IEEE Transactions on Mobile Computing.

Preface to the Special Issue on Reconfigurable Computing for Energy Efficient AI Microchip Technologies

Yajun Ha, Yingyan Lin, Lingli Wang, 2020 .

An Ultra-Low-Energy Multi-Standard JPEG Co-Processor in 65 nm CMOS With Sub/Near Threshold Supply Voltage

Yajun Ha, Henk Corporaal, Yu Pu, 2010, IEEE Journal of Solid-State Circuits.

A 65-nm 25.1-ns 30.7-fJ Robust Subthreshold Level Shifter With Wide Conversion Range

Yajun Ha, Wenfeng Zhao, Anastacia B. Alvarez, 2015, IEEE Transactions on Circuits and Systems II: Express Briefs.

Robustness-driven energy-efficient ultra-low voltage standard cell design with intra-cell mixed-Vt methodology

Yajun Ha, Wenfeng Zhao, Anastacia B. Alvarez, 2013, International Symposium on Low Power Electronics and Design (ISLPED).

Application Modeling and Scheduling

Yajun Ha, Henk Corporaal, Bart Mesman, 2011 .

Unified data authenticated encryption for vehicular communication

Yajun Ha, Yi Wang, Jianfeng An, 2016, 2016 IEEE 59th International Midwest Symposium on Circuits and Systems (MWSCAS).

Virtual Java/FPGA interface for networked reconfiguration

Rudy Lauwereins, Hugo De Man, Yajun Ha, 2001, ASP-DAC '01.

An area-efficient dynamically reconfigurable Spatial Division Multiplexing network-on-chip with static throughput guarantee

Yajun Ha, Akash Kumar, Zhiyao Joseph Yang, 2010, 2010 International Conference on Field-Programmable Technology.

Vulnerability of Deep Learning Model based Anomaly Detection in Vehicle Network

Yi Wang, Yajun Ha, Dan Wei Ming Chia, 2020, 2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS).

FPGA-Based 40.9-Gbits/s Masked AES With Area Optimization for Storage Area Network

Yajun Ha, Yi Wang, Yi (Estelle) Wang, 2013, IEEE Transactions on Circuits and Systems II: Express Briefs.

Trends and Challenges in Multimedia Systems

Yajun Ha, Henk Corporaal, Bart Mesman, 2011 .

Global Analysis of Resource Arbitration for MPSoC

Yajun Ha, Henk Corporaal, Akash Kumar, 2006, 9th EUROMICRO Conference on Digital System Design (DSD'06).

Ultra Storage-Efficient Time Digitizer for Pseudorandom Single Photon Counter Implemented on a Field-Programmable Gate Array

Yajun Ha, Zhang Qiang, Nanguang Chen, 2010, IEEE Transactions on Biomedical Circuits and Systems.

A routing algorithm for FPGAs with time-multiplexed interconnects

Yajun Ha, Ruiqi Luo, Xiaolei Chen, 2020 .

Multi-Processor System-Level Synthesis for Multiple Applications on Platform FPGA

Yajun Ha, Henk Corporaal, Akash Kumar, 2007, 2007 International Conference on Field Programmable Logic and Applications.

A SW/HW Interface API for Java/FPGA Co-Designed Applets

Rudy Lauwereins, Hugo De Man, Yajun Ha, 2001, The 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'01).

Guest Editorial Special Issue on the 2020 IEEE International Symposium on Circuits and Systems

Yajun Ha, Edoardo Bonizzoni, 2020, IEEE Trans. Circuits Syst. II Express Briefs.

A Branch Target Instruction Prefetching Technique for Improved Performance

Yajun Ha, R. Paily, P.R. Gade, 2007, 15th International Conference on Advanced Computing and Communications (ADCOM 2007).

Fast and Accurate Interval-Based Timing Estimator for Variability-Aware FPGA Physical Synthesis Tools

Yajun Ha, Wenjuan Zhang, Wei Ting Loke, 2007, 2007 International Conference on Field Programmable Logic and Applications.

An Accurate FPGA Online Delay Monitor Supporting All Timing Paths

Yajun Ha, Rui Li, Heng Yu, 2020, ISCAS.

Providing both guaranteed and best effort services using Spatial Division Multiplexing NoC with dynamic channel allocation and runtime reconfiguration

Yajun Ha, P.K. Meher, J. Lim, 2008, 2008 International Conference on Microelectronics.

Quality-Driven Dynamic Scheduling for Real-Time Adaptive Applications on Multiprocessor Systems

Yajun Ha, Bharadwaj Veeravalli, Heng Yu, 2013, IEEE Transactions on Computers.

A Routing Architecture for FPGAs with Dual-VT Switch Box and Logic Clusters

Yajun Ha, Wei Ting Loke, Yajun Ha, 2012, ARC.

sAES: A high throughput and low latency secure cloud storage with pipelined DMA based PCIe interface

Yajun Ha, Khin Mi Mi Aung, Yi Wang, 2013, 2013 International Conference on Field-Programmable Technology (FPT).

Tighter WCET analysis of input dependent programs with classified-cache memory architecture

Yajun Ha, Yanhui Li, Xiaolei Chen, 2008, 2008 15th IEEE International Conference on Electronics, Circuits and Systems.

Novel Self-Body-Biasing and Statistical Design for Near-Threshold Circuits With Ultra Energy-Efficient AES as Case Study

Massimo Alioto, Yajun Ha, Wenfeng Zhao, 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

FPGA-based high throughput XTS-AES encryption/decryption for storage area network

Yajun Ha, Yi Wang, Akash Kumar, 2014, 2014 International Conference on Field-Programmable Technology (FPT).

Resource Manager for Non-preemptive Heterogeneous Multiprocessor System-on-chip

Yajun Ha, Henk Corporaal, Bart D. Theelen, 2006, 2006 IEEE/ACM/IFIP Workshop on Embedded Systems for Real Time Multimedia.

Thermal-aware frequency scaling for adaptive workloads on heterogeneous MPSoCs

Yajun Ha, Heng Yu, Rizwan Syed, 2014, 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE).

A low overhead fault tolerant FPGA with new connection box

Yajun Ha, Fujie Wong, Yajun Ha, 2008, 2008 International Conference on Field Programmable Logic and Applications.

A 0.4V 280-nW frequency reference-less nearly all-digital hybrid domain temperature sensor

Yajun Ha, Wenfeng Zhao, Zhi Yang, 2014, 2014 IEEE Asian Solid-State Circuits Conference (A-SSCC).

Multiprocessor systems synthesis for multiple use-cases of multiple applications on FPGA

Yajun Ha, Henk Corporaal, Akash Kumar, 2008, TODE.

An area-efficient shuffling scheme for AES implementation on FPGA

Yajun Ha, Yi Wang, 2013, 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013).

An energy-efficient system on a programmable chip platform for cloud applications

Yajun Ha, Meikang Qiu, Yongxin Zhu, 2017, J. Syst. Archit..

Leakage-aware dynamic scheduling for real-time adaptive applications on multiprocessor systems

Yajun Ha, Bharadwaj Veeravalli, Heng Yu, 2010, Design Automation Conference.

A low overhead abstract architecture for FPGA resource management

Yajun Ha, Bharadwaj Veeravalli, Rizwan Syed, 2012, CARN.

Adding Hardware Support to the HotSpot Virtual Machine for Domain Specific Applications

Rudy Lauwereins, Hugo De Man, Yajun Ha, 2002, FPL.

Mapping real-life applications on run-time reconfigurable NoC-based MPSoC on FPGA

Amit Kumar Singh, Yajun Ha, Thambipillai Srikanthan, 2010, 2010 International Conference on Field-Programmable Technology.

Efficient FPGA Implementation of K-Nearest-Neighbor Search Algorithm for 3D LIDAR Localization and Mapping in Smart Vehicles

Yajun Ha, Hao Sun, Qi Deng, 2020, IEEE Transactions on Circuits and Systems II: Express Briefs.

PLAC: Piecewise Linear Approximation Computation for All Nonlinear Unary Functions

Yajun Ha, Yuanyong Luo, Manzhen Wang, 2020, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A scalable architecture to support networked reconfiguration

Hugo De Man, Yajun Ha, Patrick Schaumont, 1999 .

Analysis and Design of Reconfigurable Sense Amplifier for Compute SRAM With High-Speed Compute and Normal Read Access

Yajun Ha, Jian Chen, Wenfeng Zhao, 2021, IEEE Transactions on Circuits and Systems II: Express Briefs.

Analysis and Optimization Strategies Toward Reliable and High-Speed 6T Compute SRAM

Yajun Ha, Wenfeng Zhao, Yuqi Wang, 2021, IEEE Transactions on Circuits and Systems I: Regular Papers.

Pseudo-random single photon counting for time-resolved optical measurement.

Yajun Ha, Nan Guang Chen, Shakith Fernando, 2008, Optics express.