A. Gawase

Trench Sidewall Elimination Effect on Line-to-Line Leakage Current in Scalable Porous Silica (k= 2.1)/Cu Interconnect Structure

S. Saito, N. Oda, S. Chikaki, 2010 .

High-Etching-Selectivity Barrier SiC (k<3.5) Film for 32-nm-Node Copper/Low-k Interconnects

S. Saito, S. Kondo, N. Oda, 2010 .

Total Performance of 32-nm-Node Ultralow-$k$ /Cu Dual-Damascene Interconnects Featuring Short-TAT Silylated Porous Silica $(k = \hbox{2.1})$

S. Saito, N. Oda, S. Chikaki, 2010, IEEE Transactions on Electron Devices.

Self-Formed Barrier Technology using CuMn Alloy Seed for Copper Dual-Damascene Interconnect with porous-SiOC/porous-PAr Hybrid Dielectric

H. Shibata, A. Gawase, M. Shimada, 2007, 2007 IEEE International Interconnect Technology Conferencee.

Uniaxial-stress effect on the antiferromagnetic state in CePd2Si2

M. Yokoyama, H. Yoshizawa, H. Amitsuka, 2006 .