Jia Di

发表

High Temperature Memory Design, Implementation, and Characterization in 1μm SiC CMOS Technology

Affan Abbasi, Robert Murphree, Sajib Roy, 2019, Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT).

Snake-based brain white matter fiber reconstruction.

Meng Lu, Jia Di, Meng Lu, 2014, Bio-medical materials and engineering.

Fork Path: Improving efficiency of ORAM by removing redundant memory accesses

Yiran Chen, Xian Zhang, Yun Liang, 2015, 2015 48th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO).

A novel PUF based on cell error rate distribution of STT-RAM

Yiran Chen, Xian Zhang, Guangyu Sun, 2016, 2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC).

Energy-aware multiplier design in multi-rail encoding logic

Jia Di, Jinhong Yuan, M. Hagedorn, 2002, The 2002 45th Midwest Symposium on Circuits and Systems, 2002. MWSCAS-2002..

Investigation and design modification of delay-insensitive asynchronous circuits for minimum supply voltage operation

Jia Di, David Coleman, 2010, Proceedings of the IEEE SoutheastCon 2010 (SoutheastCon).

Hardware Trojan Detection and Functionality Determination for Soft IPs

Jia Di, Shaojie Zhang, Yier Jin, 2018, 2018 IEEE 3rd International Verification and Security Workshop (IVSW).

Multi-Threshold Asynchronous Circuit Design for Ultra-Low Power

Jia Di, Scott C. Smith, Andrew Bailey, 2008, J. Low Power Electron..

Clockless Spintronic Logic: A Robust and Ultra-Low Power Computing Paradigm

Mingjie Lin, Jia Di, Ronald F. DeMara, 2018, IEEE Transactions on Computers.

Comprehensive Comparison of NULL Convention Logic Threshold Gate Implementations

Jia Di, Kelby Haulmark, Wassim Khalil, 2018, 2018 New Generation of CAS (NGCAS).

Tracking data flow at gate-level through structural

Mark Mohammad Tehranipoor, Domenic Forte, Jia Di, 2016, 2016 International Great Lakes Symposium on VLSI (GLSVLSI).

Built-In Self-Test for Multi-Threshold NULL Convention Logic Asynchronous Circuits

Jia Di, Brett Sparkman, Scott C. Smith, 2020, 2020 IEEE 38th VLSI Test Symposium (VTS).

Application of Ring Vibration Isolation Mass in Noise Reduction of Actual Ships

Jia Di, 2011 .

Side-channel attack mitigation using dual-spacer Dual-rail Delay-insensitive Logic (D3L)

Jia Di, Scott Smith, Washington Cilio, 2010, Proceedings of the IEEE SoutheastCon 2010 (SoutheastCon).

Database-based Online Call Graph Tool Applications

Jia Di, Xiang Yong, Sun Weizhen, 2016 .

Ultra-low voltage digital circuit design: A comparative study

Jia Di, A. Arthurs, J. Roark, 2012, 2012 IEEE Faible Tension Faible Consommation.

Parallel Numerical Simulation and Efficiency Analysis of the Flow Field of Supersonic Vehicle

Jia Di, 2006 .

Wireless Sensor Node Platform for In-Plant Stress Monitoring

Affan Abbasi, Jia Di, Alan Mantooth, 2020, 2020 IEEE Sensors.

Source code comments quality assessment method based on aggregation of classification algorithms

Li Bin, Jia Di, Yu Hai, 2016 .

A new topology for fully differential amplifiers that enhances their tolerance to external disturbances

H. Alan Mantooth, Jia Di, Guoyuan Fu, 2011, 2011 9th IEEE International Conference on ASIC.

A 12-bit CMOS current steering D/A converter with a fully differential voltage output

H. Alan Mantooth, Jia Di, Guoyuan Fu, 2011, 2011 12th International Symposium on Quality Electronic Design.

Framework of a scalable delay-insensitive asynchronous platform enabling heterogeneous concurrency

Jia Di, Liang Men, 2014, 2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS).

A Framework on Mitigating Single Event Upset using Delay-Insensitive Asynchronous Circuits

Jia Di, 2007, 2007 IEEE Region 5 Technical Conference.

Hardware IP Classification through Weighted Characteristics

Jia Di, Thao Le, Brendan McGeehan, 2019, 2019 IEEE High Performance Extreme Computing Conference (HPEC).

A SiC CMOS Digitally Controlled PWM Generator for High-Temperature Applications

Ashfaqur Rahman, Affan Abbasi, H. Alan Mantooth, 2017, IEEE Transactions on Industrial Electronics.

A pFET-access radiation-hardened SRAM for extreme environments

Jia Di, Guoyuan Fu, M. Schupbach, 2008, 2008 51st Midwest Symposium on Circuits and Systems.

Securing DC and hybrid microgrids

Jia Di, Fengli Zhang, Yusi Liu, 2015, 2015 IEEE First International Conference on DC Microgrids (ICDCM).

D3L - A framework on fighting against non-invasive attacks to integrated circuits for security applications

Jia Di, Fengwei Yang, 2005, Circuits, Signals, and Systems.

Glitch-free design for multi-threshold CMOS NCL circuits

Jia Di, Andrew Bailey, Ahmad Al Zahrani, 2009, GLSVLSI '09.

A Weak Asynchronous RESet (ARES) PUF Using Start-up Characteristics of Null Conventional Logic Gates

Jia Di, Mark Howard, Domenic Forte, 2020, 2020 IEEE International Test Conference (ITC).

Improving power-awareness of pipelined array multipliers using two-dimensional pipeline gating and its application on FIR design

Jia Di, Ronald F. DeMara, Jiann S. Yuan, 2006, Integr..

An optimization algorithm based on TFPA for multiple components modules

Jie Yang, Jia Di, Ning Ye, 2016, 2016 IEEE 11th Conference on Industrial Electronics and Applications (ICIEA).

Energy Aware Design and Analysis for Synchronous and Asynchronous Circuits

Jia Di, 2004 .

Mitigating power- and timing-based side-channel attacks using dual-spacer dual-rail delay-insensitive asynchronous logic

Jia Di, Scott C. Smith, Chris Porter, 2013, Microelectron. J..

Ownership Transfer of RFID Tags based on Electronic Fingerprint

Jia Di, Dale R. Thompson, Senthilkumar Chinnappa Gounder Periaswamy, 2008, Security and Management.

Teaching low-power electronic design in electrical and computer engineering

Jia Di, Jiann S. Yuan, 2005, IEEE Transactions on Education.

Reinforcing treatment of the punching pile of the engineering

Jia Di, 2012 .

Recent Advances in Low Power Asynchronous Circuit Design

Jia Di, John Brady, Thao Le, 2017, J. Low Power Electron..

Enhanced Uptime and Firmware Cybersecurity for Grid-Connected Power Electronics

Jia Di, Chris Farnell, H. Alan Mantooth, 2019, 2019 IEEE CyberPELS (CyberPELS).

A Comparative Study of Ultra-Low Voltage Digital Circuit Design

Jia Di, Aaron Arthurs, Justin Roark, 2012, VLSIC 2012.

Delay Insensitive Ternary CMOS Logic for Secure Hardware

Jia Di, Scott C. Smith, Ravi S. P. Nair, 2015 .

Investigation and Comparison of Bus Alternatives for Asynchronous Circuits

Jia Di, Mark Howard, Nicholas Mize, 2018, SoutheastCon 2018.

Evaluating the capability and performance of access control policy verification tools

Qinghua Li, Ang Li, Jia Di, 2015, MILCOM 2015 - 2015 IEEE Military Communications Conference.

Multi-threshold dual-spacer dual-rail delay-insensitive logic: An improved IC design methodology for side channel attack mitigation

Jia Di, Francis Sabado, Jean Pierre T. Habimana, 2016, 2016 IEEE International Symposium on Circuits and Systems (ISCAS).

Delay-insensitive asynchronous ALU for cryogenic temperature environments

Jia Di, Guoyuan Fu, M. Schupbach, 2008, 2008 51st Midwest Symposium on Circuits and Systems.

Security for RFID Tags

Jia Di, Dale R. Thompson, 2012 .

Ultra-Wide Temperature (-230°C to 130°C) DC-Motor Drive with SiGe Asynchronous Controller

Jia Di, R. Schupbach, A. Lostetter, 2008, 2008 IEEE Aerospace Conference.

Multi-Threshold NULL Convention Logic (MTNCL): An Ultra-Low Power Asynchronous Circuit Design Methodology

Liang Zhou, Jia Di, F. A. Parsan, 2015 .

Cellular Array-based Delay-insensitive Asynchronous Circuits Design and Test for Nanocomputing Systems

Jia Di, Parag K. Lala, P. Lala, 2007, J. Electron. Test..

Framework of an Adaptive Delay-Insensitive Asynchronous Platform for Energy Efficiency

Jia Di, Liang Men, Brent Hollosi, 2014, 2014 IEEE Computer Society Annual Symposium on VLSI.

Power-aware pipelined multiplier design based on 2-dimensional pipeline gating

Jia Di, Jiann S. Yuan, 2003, GLSVLSI '03.

Reducing Power Consumption in Asynchronous MTNCL Circuits through Selective Sleep

Jia Di, Cole Sherrill, Michael Tennant, 2020, 2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS).

Synthesis of nanoelectronic circuits on delay-insensitive cellular arrays

Jia Di, Dilip P. Vasudevan, 2006, Third IEEE International Workshop on Electronic Design, Test and Applications (DELTA'06).

Golden reference matching for gate-level netlist functionality identification

Jia Di, Thao Le, 2017, 2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS).

Feature selection for RFID tag identification

Jiang Li, Jia Di, Dale R. Thompson, 2012, 7th International Conference on Communications and Networking in China.

Asynchronous Digital Circuits

Jia Di, Scott C. Smith, 2012 .

Chip-level anti-reverse engineering using transformable interconnects

Mark Mohammad Tehranipoor, Domenic Forte, Jia Di, 2015, 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS).

Voltage Stacking for Simplifying Power Management in Asynchronous Circuits

Zhong Chen, Jia Di, Andrew Suchanek, 2018, International Journal of VLSI Design & Communication Systems.

Asynchronous Circuit Stacking for Simplified Power Management

Jia Di, Zhong Chen, Andrew Suchanek, 2018, SoutheastCon 2018.

A comparative analysis of 3D-IC partitioning schemes for asynchronous circuits

Jia Di, Chien-Wei Lo, Francis Sabado, 2014, 2014 IEEE International Conference on IC Design & Technology.

RESEARCH ON THE EXCITING FORCE OF EQUIPMENT TO SHIP STRUCTURE AND ITS APPLICATION

Jia Di, 2012 .

A New Noise Removal Method Based on Fourth-Order Nonlinear Diffusion

Jia Di, 2005 .

The Old Frontier of Reverse Engineering: Netlist Partitioning

Jia Di, Shaojie Zhang, Yier Jin, 2018, Journal of Hardware and Systems Security.

Asynchronous Parallel Platforms with Balanced Performance and Energy

Jia Di, Liang Men, 2014, J. Low Power Electron..

Investigation of obfuscation-based anti-reverse engineering for printed circuit boards

Mark Mohammad Tehranipoor, Domenic Forte, Jia Di, 2015, 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC).

Complex High-Temperature CMOS Silicon Carbide Digital Circuit Designs

Jia Di, Ashfaqur Rahman, H. Alan Mantooth, 2016, IEEE Transactions on Device and Materials Reliability.

An efficient run-time encryption scheme for non-volatile main memory

Tao Zhang, Xian Zhang, Jia Di, 2013, 2013 International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES).

Asynchronous and synchronous designs for low-power FDSOI CMOS process optimized for subthreshold operation at 0.3V VDD

Jia Di, Liang Men, Chien-Wei Lo, 2015, 2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S).

Designing Asynchronous Circuits using NULL Convention Logic (NCL)

Jia Di, Scott C. Smith, 2009, Designing Asynchronous Circuits using NULL Convention Logic.

On the effect of stuck-at faults on delay-insensitive nanoscale circuits

Jia Di, Parag K. Lala, Dilip P. Vasudevan, 2005, 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'05).

An automated design flow framework for delay-insensitive asynchronous circuits

Jia Di, A. Arthurs, B. Hollosi, 2012, 2012 Proceedings of IEEE Southeastcon.

Radiation Hardened NULL Convention Logic Asynchronous Circuit Design

Liang Zhou, Jia Di, Scott C. Smith, 2015 .

Golden Reference Library Matching of Structural Checking for securing soft IPs

Jia Di, Thao Le, Lucas Weaver, 2016, SoutheastCon 2016.

Ultra-low power delay-insensitive circuit design

Jia Di, S.C. Smith, H.A. Mantooth, 2008, 2008 51st Midwest Symposium on Circuits and Systems.

Identifying passive UHF RFID tags using signal features at different Tari durations

Jia Di, B. A. Alsaify, D. R. Thompson, 2012, 2012 IEEE International Conference on RFID (RFID).

A Hardware Threat Modeling Concept for Trustable Integrated Circuits

Jia Di, S. Smith, 2007, 2007 IEEE Region 5 Technical Conference.

Obfuscation-Based Protection Framework against Printed Circuit Boards Unauthorized Operation and Reverse Engineering

Domenic Forte, Jia Di, Zimu Guo, 2017, ACM Trans. Design Autom. Electr. Syst..

Teaching RFID Information Systems Security

Jia Di, Michael K. Daugherty, Dale R. Thompson, 2014, IEEE Transactions on Education.

Investigation and comparison of thermal distribution in synchronous and asynchronous 3D ICs

Tao Zhang, Yuan Xie, Jia Di, 2009, 2009 IEEE International Conference on 3D System Integration.

Dynamic Active-bit Detection and Operands Exchange for Designing Energy-aware Asynchronous Multipliers

Jia Di, Jiann S. Yuan, 2005, CDES.

Analysis and Improvement of Delay-Insensitive Asynchronous Circuits Operating in Subthreshold Regime

Jia Di, David Coleman, 2010, J. Low Power Electron..

Fingerprinting RFID Tags

Jia Di, Dale R. Thompson, Senthilkumar Chinnappa Gounder Periaswamy, 2011, IEEE Transactions on Dependable and Secure Computing.

Forced Boundary-Layer Transition of Axisymmetric Inlet in Mach 8 Gun Wind Tunnel and Its Numerical Verification

Jia Di, Yi Shihe, Fan Xiao-qiang, 2005 .

Bit-Wise MTNCL: An ultra-low power bit-wise pipelined asynchronous circuit design methodology

Liang Zhou, Jia Di, Scott C. Smith, 2010, 2010 53rd IEEE International Midwest Symposium on Circuits and Systems.

Analysis of ultra-low voltage digital circuits over process variations

Jia Di, A. Arthurs, J. Di, 2012, 2012 IEEE Subthreshold Microelectronics Conference (SubVT).

An Asynchronous Advanced Encryption Standard Core Design for Energy Efficiency

Jia Di, Scott Smith, Brett Sparkman, 2013, J. Low Power Electron..

Delay-Insensitive Ternary Logic

Jia Di, Scott C. Smith, Ravi Sankar Parameswaran Nair, 2009, CDES.

The effects of flooding attacks on time-critical communications in the smart grid

Qinghua Li, Jing Yang, H. Alan Mantooth, 2015, 2015 IEEE Power & Energy Society Innovative Smart Grid Technologies Conference (ISGT).

An asynchronous finite impulse response filter design for Digital Signal Processing circuit

Jia Di, Liang Men, 2014, 2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS).

Student Cross-Training Opportunities for Combining Food, Transportation, and Critical Infrastructure Cybersecurity Into an Academic Food Systems Education Program

Chase Rainwater, Jia Di, Dale R. Thompson, 2018 .

Delay-Insensitive Cell Matrix

Jia Di, Scott Smith, David Roclin, 2010, CDES.

MTD 3 L: a secure IC design methodology with reduced overhead

Jia Di, Scott C. Smith, Michael Linder, 2012 .

Application of Multi-Threshold NULL Convention Logic to Adaptive Beamforming Circuits for Ultra-Low Power

Jia Di, Shiming Li, William Bouillon, 2016 .

A Novel Optimization Algorithm for Thermal Design of MCMs

Jia Di, Wei Zheng, Jie Yang, 2020, 2020 Chinese Control And Decision Conference (CCDC).

A Compact, Self-Contained Cough Monitoring System

Jia Di, M. Barlow, V.V. Varadan, 2007, 2007 IEEE Region 5 Technical Conference.

Towards Trustable Embedded Systems: Hardware Threat Modeling for Integrated Circuits

Jia Di, 2008 .

Multi-Threshold Dual-Spacer Dual-Rail Delay-Insensitive Logic (MTD3L): A Low Overhead Secure IC Design Methodology

Jia Di, Scott C. Smith, Michael Linder, 2013 .

Detecting Malicious Logic Through Structural Checking

Jia Di, S.C. Smith, S. Smith, 2007, 2007 IEEE Region 5 Technical Conference.

An asynchronous cell library for operation in wide-temperature & ionizing-radiation environments

Jia Di, Jim Holmes, H. Alan Mantooth, 2015, 2015 IEEE Aerospace Conference.

SiGe BiCMOS comparator for extreme environment applications

Jia Di, Alan Mantooth, Benjamin Sissons, 2015, 2015 IEEE Aerospace Conference.

Enhancing Voltage Scalability of Asynchronous Circuits through Logic Transformation

Jia Di, Kelby Haulmark, Wassim Khalil, 2019, 2019 SoutheastCon.

Energy-Aware Dual-Rail Bit-Wise Completion Pipelined Arithmetic Circuit Design

Jia Di, Jiann S. Yuan, Jiann-Shiun Yuan, 2006, J. Low Power Electron..

高温スイッチモードレギュレータのための調整可能な電流不足遅延発生器を用いたディジタル制御されたSiC CMOS PWM発生器の実現【Powered by NICT】

Affan Abbasi, Jia Di, Jim Holmes, 2016 .

High throughput power-aware FIR filter design based on fine-grain pipelining multipliers and adders

Jia Di, Ronald F. DeMara, Jiann S. Yuan, 2003, IEEE Computer Society Annual Symposium on VLSI, 2003. Proceedings..

Reconfigurable ASIC Implementation of Asynchronous Recurrent Neural Networks

Jia Di, Zhihang Yuan, Guangyu Sun, 2021, 2021 27th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC).

Character Reassignment for Hardware Trojan Detection

Jia Di, Hunter Nauman, Noah Waller, 2021, 2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS).

Using dummy data for RFID tag and reader authentication

Jia Di, Abdallah Alma’aitah, Baha’ A. Alsaify, 2021, Digit. Commun. Networks.

Design of Asynchronous Polymorphic Logic Gates for Hardware Security

Jia Di, Chandler Bernard, William Bryant, 2021, 2021 IEEE High Performance Extreme Computing Conference (HPEC).

High Temperature Data Converters in Silicon Carbide CMOS

Jia Di, Alan Mantooth, Sajib Roy, 2017, IEEE Transactions on Electron Devices.

Structural Checking: Detecting Malicious Logic Without a Golden Reference

Jia Di, Jordan R. Yust, J. Di, 2012 .

High-Temperature SiC CMOS Comparator and op-amp for Protection Circuits in Voltage Regulators and Switch-Mode Converters

Affan Abbasi, Robert Murphree, Jia Di, 2016, IEEE Journal of Emerging and Selected Topics in Power Electronics.