Adel Baganne

发表

Design and Hardware Implementation of QoSS - AES Processor for Multimedia applications

Rached Tourki, Belgacem Bouallegue, Mohsen Machhout, 2010, Trans. Data Priv..

Area-Time Efficient Hardware Implementation of Elliptic Curve Cryptosystem

Belgacem Bouallegue, Mohsen Machhout, Anissa Sghaier, 2015, IACR Cryptol. ePrint Arch..

Performance evaluation and design considerations of lightweight block cipher for low-cost embedded devices

Rached Tourki, Mohsen Machhout, Zeghid Medien, 2016, 2016 IEEE/ACS 13th International Conference of Computer Systems and Applications (AICCSA).

A simulation based approach for incorporating virtual components IP cores into multimedia systems design

Mehrez Marzougui, Eric Martin, Adel Baganne, 2003, 2003 IEEE International Conference on Acoustics, Speech, and Signal Processing, 2003. Proceedings. (ICASSP '03)..

Efficient Hybrid Encryption System Based on Block Cipher and Chaos Generator

Rached Tourki, Mohsen Machhout, Zeghid Medien, 2016, 2016 IEEE International Conference on Computer and Information Technology (CIT).

Low power design of an acoustic echo canceller Gmdf/spl alpha/ algorithm on dedicated VLSI architectures

Eric Martin, Nathalie Julien, Adel Baganne, 1999, Proceedings Ninth Great Lakes Symposium on VLSI.

A New Network on Chip Design Dedicated to Multicast Service

Rached Tourki, Adel Baganne, Mohamed Fehmi Chatmen, 2016 .

High-Level Implementation of a Chaotic and AES Based Crypto-System

Rached Tourki, Mohsen Machhout, Zeghid Medien, 2017, J. Circuits Syst. Comput..

A multi-level design flow for incorporating IP cores: case study of 1D wavelet IP integration

Mehrez Marzougui, Eric Martin, Adel Baganne, 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.

Performance evaluation of MIC@R NoC for real-time applications

Rached Tourki, Kholdoun Torki, Adel Baganne, 2010, Int. J. Comput. Aided Eng. Technol..

A formal method for hardware IP design and integration under I/O and timing constraints

Emmanuel Casseau, Philippe Coussy, Eric Martin, 2006, TECS.

New Design of Network on Chip Based on Virtual Routers

Rached Tourki, Adel Baganne, Mohamed Fehmi Chatmen, 2016 .

Monitoring transaction level SystemC models using a generic and aspect-oriented framework

Rached Tourki, Younes Lahbib, Meriam Kallel, 2012, Int. J. Comput. Aided Eng. Technol..

A Reconfigurable Implementation of the New Secure Hash Algorithm

Rached Tourki, Belgacem Bouallegue, Mohsen Machhout, 2007, The Second International Conference on Availability, Reliability and Security (ARES'07).

Low latency multicasting architecture implemented using new network topology

Rached Tourki, Adel Baganne, Med fehmi Chatmen, 2019, Microprocess. Microsystems.

A Co-Design Methodology for Telecommunication Systems: A Case Study of an Acoustic Echo Canceller

Jean Luc Philippe, Eric Martin, Adel Baganne, 1999, J. VLSI Signal Process..

MIC@R : A Generic Low Latency Router for On-Chip Networks

Rached Tourki, Adel Baganne, Rafik Ben-Tekaya, 2007, 2007 14th IEEE International Conference on Electronics, Circuits and Systems.

A simulation based approach for incorporating virtual components IP cores into multimedia systems design

Mehrez Marzougui, Eric Martin, Adel Baganne, 2003, 2003 International Conference on Multimedia and Expo. ICME '03. Proceedings (Cat. No.03TH8698).

Co-simulation and communication synthesis approach for intellectual properties based SoCs

Rached Tourki, Mohamed Abid, Mehrez Marzougui, 2004, Comput. Electr. Eng..

Constrained algorithmic IP design for system-on-chip

Emmanuel Casseau, Philippe Coussy, Pierre Bomel, 2007, Integr..

A Chaos-Based Approach for Correcting the Security Level of a Block Cipher Algorithm

Rached Tourki, Mohsen Machhout, Medien Zeghid, 2016 .

A design methodology for IP integration

Philippe Coussy, Eric Martin, Adel Baganne, 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

IP cores integration in DSP System-on-chip designs

Philippe Coussy, Eric Martin, Adel Baganne, 2002, 2002 11th European Signal Processing Conference.

Communication and Timing Constraints Analysis for IP Design and Integration

Philippe Coussy, Eric Martin, Adel Baganne, 2003, VLSI-SOC.

Verification of SystemC transaction level models using an aspect-oriented and generic approach

Rached Tourki, Younes Lahbib, Meriam Kallel, 2010, 5th International Conference on Design & Technology of Integrated Systems in Nanoscale Era.

A Format-Compliant Selective Encryption Scheme for Real-Time Video Streaming of the H.264/AVC

Rached Tourki, Mohsen Machhout, Medien Zeghid, 2016 .

A Selective Encryption Scheme with Multiple Security Levels for the H.264/AVC Video Coding Standard

Rached Tourki, Mohsen Machhout, Zeghid Medien, 2016, 2016 IEEE International Conference on Computer and Information Technology (CIT).

Hardware interface design for real time embedded systems

Jean Luc Philippe, Eric Martin, Adel Baganne, 1997, Proceedings Great Lakes Symposium on VLSI.

Performance evaluation of MIC@R router for on-chip networks

Rached Tourki, Kholdoun Torki, Adel Baganne, 2009, 2009 4th International Conference on Design & Technology of Integrated Systems in Nanoscal Era.

Nouvelles architectures génériques de NoC

Rached Tourki, Abdelkrim Zitouni, Adel Baganne, 2009, Tech. Sci. Informatiques.

Aspect-based ABV for SystemC transaction level models

Rached Tourki, Younes Lahbib, Meriam Kallel, 2009, 2009 International Conference on Microelectronics - ICM.

A methodology for IP integration into DSP SoC: a case study of a MAP algorithm for turbo decoder

Amor Nafkha, David Gnaedig, Emmanuel Boutillon, 2004, 2004 IEEE International Conference on Acoustics, Speech, and Signal Processing.

A Modified AES Based Algorithm for Image Encryption

Rached Tourki, Mohsen Machhout, Lazhar Khriji, 2007 .

A new approach for encryption system based on block cipher algorithms and logistic function

Rached Tourki, Zeghid Medien, Adel Baganne, 2015, 2015 IEEE 12th International Multi-Conference on Systems, Signals & Devices (SSD15).