G. Visweswaran

Priority wavelet packet decomposition and representation

S. Joshi, L. K. Jiwani, G. Visweswaran, 2011 .

Implementation of first and third order fractional order differentiators and integrators using switched capacitors

Maneesha Gupta, G. Visweswaran, P. Varshney, 2011, India International Conference on Power Electronics 2010 (IICPE2010).

First and higher order operator based fractional order differentiator and integrator models

M. Gupta, G. Visweswaran, P. Varshney, 2009, TENCON 2009 - 2009 IEEE Region 10 Conference.

A systematic approach for the design of ladder based switched current bandpass filter

Maneesha Gupta, G. Visweswaran, P. Varshney, 2006 .

Digital fractional‐order differentiator and integrator models based on first‐order and higher order operators

Maneesha Gupta, G. S. Visweswaran, Pragya Varshney, 2011, Int. J. Circuit Theory Appl..

A 32 kb 0.35–1.2 V, 50 MHz–2.5 GHz Bit-Interleaved SRAM With 8 T SRAM Cell and Data Dependent Write Assist in 28-nm UTBB-FDSOI CMOS

Edith Beigné, Bastien Giraud, Jean-Philippe Noel, 2017, IEEE Transactions on Circuits and Systems I: Regular Papers.

Quasistatic analysis of a dynamic sense amplifier

G. S. Visweswaran, A. B. Bhattacharyya, N. K. Jain, 1985 .

New Approach to Realize Fractional Power in $z$-Domain at Low Frequency

Maneesha Gupta, G. S. Visweswaran, Pragya Varshney, 2011, IEEE Transactions on Circuits and Systems II: Express Briefs.

FFT based sign modulated DWT filter bank

G. S. Visweswaran, S. D. Joshi, Lalit K. Jiwani, 2010, 2010 18th European Signal Processing Conference.