Srinath R. Naidu

Statistical Timing for Parametric Yield Prediction of Digital Integrated Circuits

Chandramouli Visweswariah, Ralph H. J. M. Otten, Jochen A. G. Jess, 2006, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Minimizing stand-by leakage power in static CMOS circuits

Srinath R. Naidu, E. T. A. F. Jacobs, S. Naidu, 2001, Proceedings Design, Automation and Test in Europe. Conference and Exhibition 2001.

Timing yield calculation using an impulse-train approach

Srinath R. Naidu, 2002, Proceedings of ASP-DAC/VLSI Design 2002. 7th Asia and South Pacific Design Automation Conference and 15h International Conference on VLSI Design.

Geometric Programming Formulation for Gate Sizing with Pipelining Constraints

Srinath R. Naidu, 2015, 2015 28th International Conference on VLSI Design.

Measurement of Acid Content in Rain Water Using Wireless Sensor Networks and Artificial Neural Networks

Srinath R. Naidu, Sakshi Gangrade, 2019 .

Parameter-importance based Monte-Carlo technique for variation-aware analog yield optimization

Srinath R. Naidu, Sita kondamadugula, S. Naidu, 2016, 2016 International Great Lakes Symposium on VLSI (GLSVLSI).

Fast Approach for Iris Detection on GPU by Applying Search Localization for Circular Hough Transform

Srinath R. Naidu, Pinkey Kumari, S. Naidu, 2018, 2018 International Conference on Advances in Computing, Communications and Informatics (ICACCI).

On Synthesis of Easily Testable (k, K) Circuits

Vijay Chandru, Srinath R. Naidu, 2003, IEEE Trans. Computers.

Statistical Timing for Parametric Yield Prediction of Digital Integrated Circuits

Chandramouli Visweswariah, Ralph H. J. M. Otten, Jochen A. G. Jess, 2003, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Speeding up Monte-Carlo Simulation for Statistical Timing Analysis of Digital Integrated Circuits

Srinath R. Naidu, S. Naidu, 2007, 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07).

Robot Path Planning Using Memory

Srinath R. Naidu, Gadhamsetty Ravi Theja, 2019 .

A convex programming solution for gate-sizing with pipelining constraints

Srinath R. Naidu, 2021 .