H. Gossner

发表

Wide range control of the sustaining voltage of ESD protection elements realized in a smart power technology

M. Stecher, H. Gossner, T. Muller-Lynch, 1999, Electrical Overstress/Electrostatic Discharge Symposium Proceedings. 1999 (IEEE Cat. No.99TH8396).

Cable discharges into communication interfaces

R. Gartner, H. Gossner, T. Brodbeck, 2006, 2006 Electrical Overstress/Electrostatic Discharge Symposium.

Part II: A Novel Scheme to Optimize the Mixed-Signal Performance and Hot-carrier Reliability of Drain-Extended MOS Devices

M. Shrivastava, V.R. Rao, H. Gossner, 2010, IEEE Transactions on Electron Devices.

Multi-terminal pulsed force & sense ESD verification of I/O libraries and ESD simulations

D. Schmitt-Landsiedel, H. Gossner, K. Esmark, 2004, 2004 Electrical Overstress/Electrostatic Discharge Symposium.

Study of bipolar transistor action during ESD stress in smart power ESD protection devices using interferometric temperature mapping

M. Stecher, H. Gossner, T. Muller-Lynch, 1999, 29th European Solid-State Device Research Conference.

A Novel Drain-Extended FinFET Device for High-Voltage High-Speed Applications

M. Shrivastava, H. Gossner, V. R. Rao, 2012, IEEE Electron Device Letters.

Design methodology of FinFET devices that meet IC-Level HBM ESD targets

R. Rooyackers, G. Groeseneken, M. Sawada, 2008, EOS/ESD 2008 - 2008 30th Electrical Overstress/Electrostatic Discharge Symposium.

An automated approach for verification of onchip interconnect resistance for electrostatic discharge paths

H. Gossner, N. Trivedi, H. Dhakad, 2011, EOS/ESD Symposium Proceedings.

Part I: Mixed-Signal Performance of Various High-Voltage Drain-Extended MOS Devices

M. Shrivastava, V.R. Rao, H. Gossner, 2010, IEEE Transactions on Electron Devices.

Simulation and experimental study of temperature distribution during ESD stress in smart-power technology ESD protection structures

Dionyz Pogany, Erich Gornik, G. Groos, 2000, 2000 IEEE International Reliability Physics Symposium Proceedings. 38th Annual (Cat. No.00CH37059).

SoC — A real challenge for ESD protection?

H. Gossner, K. Esmark, W. Stadler, 2005, 2005 Electrical Overstress/Electrostatic Discharge Symposium.

Base pushout driven snapback in parasitic bipolar devices between different power domains

W. Fichtner, H. Gossner, K. Esmark, 2004, 2004 IEEE International Reliability Physics Symposium. Proceedings.

Chip-level ESD simulation for fail detection and design guidance

D. Schmitt-Landsiedel, H. Gossner, K. Esmark, 2004, 2004 IEEE International Reliability Physics Symposium. Proceedings.

Chasing a latent CDM ESD failure by unconventional FA methodology

H. Dhakad, H. Gossner, B. Stein, 2012, Electrical Overstress / Electrostatic Discharge Symposium Proceedings 2012.

Energy-Optimised Building- Experience and Future Perspectives from a Demonstration Programme in Germany

Andreas Wagner, Sebastian Herkel, Jens Pfafferott, 2008 .

Novel devices in ESD protection

H. Gossner, J. Schneider, 2007, 2007 International Workshop on Physics of Semiconductor Devices.

A Drain-Extended MOS Device With Spreading Filament Under ESD Stress

M. Shrivastava, H. Gossner, C. Russ, 2012, IEEE Electron Device Letters.

Influence of Layout Parameters on Triggering Behavior in 0.35um and 0.18um Process gg-nMOS ESD Protection Devices

H. Gossner, K. Esmark, M. Litzenberger, 2001, 31st European Solid-State Device Research Conference.

FinFET current mirror design and evaluation

G. Knoblinger, A. Marshall, C. Duvvury, 2005, 2005 IEEE Dallas/CAS Workshop on Architecture, Circuits and Implementtation of SOCs.

Understanding the optimization of sub-45nm FinFET devices for ESD applications

C. Duvvury, N. Collaert, D. Linten, 2007, 2007 29th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD).

ESD evaluation of the emerging MuGFET technology

A. Marshall, C. Duvvury, C.R. Cleavelin, 2005, 2005 Electrical Overstress/Electrostatic Discharge Symposium.

Investigation of 3D Phenomena in the Triggering of gg-nMOS Electrostatic Discharge Protection Devices

H. Gossner, K. Esmark, C. Furbock, 2000, 30th European Solid-State Device Research Conference.

Unique ESD Failure Mechanism in a MuGFET Technology

C. Duvvury, H. Gossner, T. Schulz, 2006, 2006 International Electron Devices Meeting.

Nonlinear dynamics approach in modeling of the on-state-spreading - related voltage and current transients in 90nm CMOS silicon controlled rectifiers

M. Stecher, H. Gossner, K. Esmark, 2009, 2009 IEEE International Electron Devices Meeting (IEDM).

Interferometric temperature mapping during ESD stress and failure analysis of smart power technology ESD protection devices

M. Stecher, N. Seliger, H. Gossner, 1999, Electrical Overstress/Electrostatic Discharge Symposium Proceedings. 1999 (IEEE Cat. No.99TH8396).

Transient behavior of SCRS during ESD pulses

H. Gossner, K. Esmark, S. Bychikhin, 2008, 2008 IEEE International Reliability Physics Symposium.

Study of trigger instabilities in smart power technology ESD protection devices using a laser interferometric thermal mapping technique

G. Groos, M. Stecher, H. Gossner, 2001, 2001 Electrical Overstress/Electrostatic Discharge Symposium.

Impact of Strain on ESD Robustness of FinFET Devices

R. Rooyackers, G. Meneghesso, C. Duvvury, 2008, 2008 IEEE International Electron Devices Meeting.

Characterization and Optimization of Sub-32-nm FinFET Devices for ESD Applications

R. Rooyackers, C. Duvvury, N. Collaert, 2008, IEEE Transactions on Electron Devices.