Xuan Li

A dual-output hardening design of inverter chain for P-hit single-event transient pulse elimination

Qiang Zhao, Xuan Zeng, Xuan Li, 2018, IEICE Electron. Express.

In-Memory Computing With Double Word Lines and Three Read Ports for Four Operands

Wenjuan Lu, Junning Chen, Xiulong Wu, 2020, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A single event upset tolerant latch with parallel nodes

Xuan Zeng, Qiang Zhao, Xiangdong Hu, 2019, IEICE Electron. Express.

Cascade Current Mirror to Improve Linearity and Consistency in SRAM In-Memory Computing

Junning Chen, Xiulong Wu, Chunyu Peng, 2021, IEEE Journal of Solid-State Circuits.

Reverse Bias Current Eliminated, Read-Separated, and Write-Enhanced Tunnel FET SRAM

Xuan Li, Xiulong Wu, Chunyu Peng, 2021, IEEE Transactions on Circuits and Systems II: Express Briefs.