S. Boret

发表

In-Situ Silicon Integrated Tuner for Automated On-Wafer MMW Noise Parameters Extraction using Multi-Impedance Method for Transistor Characterization

D. Gloria, Y. Tagro, S. Boret, 2009, 2009 IEEE International Conference on Microelectronic Test Structures.

State of the art 200 GHz passive components and circuits integrated in advanced thin SOI CMOS technology on High Resistivity substrate

Ph. Benech, F. Gianesello, D. Gloria, 2006, 2006 IEEE international SOI Conferencee Proceedings.

Modeling and optimization of series resistance of planar MIM capacitors

Gerard Ghibaudo, G. Pananakakis, E. Picollet, 2006 .

An above IC MEMS RF switch

Didier Belot, C. Billard, S. Boret, 2003 .

Multiport de-embedding technique for balanced varactor high frequency characterization

D. Gloria, S. Boret, Y. Morandini, 2009, 2009 European Microwave Conference (EuMC).

Planar filters in W- and G-band : design and technology

Eric Rius, G. Wolf, Henri Happy, 2005 .

High resistivity SOI CMOS technology for multi-standard RF frontends

F. Gianesello, D. Gloria, C. Raynaud, 2008, 2008 IEEE International SOI Conference.

Small-Size low losses WLAN and GSM/DCS diplexers integrated in a low cost 130 nm high resistivity SOI CMOS technology

A. Giry, F. Gianesello, D. Gloria, 2009, 2009 European Microwave Conference (EuMC).

State oftheart200GHzpassive components andcircuits integrated in advanced thinSOICMOS technology onHighResistivity substrate

Daniel Gloria, Ph. Benech, S. Boret, 2006 .

Integrated Inductors inHR SOICMOS technologies: on theeconomic advantage ofSOItechnologies fortheintegration ofRFapplications

Daniel Gloria, S. Boret, S. Montusclat, 2007 .

Record RF performance of standard 90 nm CMOS technology

D.B.M. Klaassen, I.-S. Lim, L.F. Tiemeijer, 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..

State of the art integrated millimeter wave passive components and circuits in advanced thin SOI CMOS technology on high resistivity substrate

Ph. Benech, F. Gianesello, D. Gloria, 2005, 2005 IEEE International SOI Conference Proceedings.

65nm RFCMOStechnologies withbulkandHR SOIsubstrate for millimeter wave passives andcircuits characterized up to220GHZ

Gilles Dambrine, S. Boret, C. Clement, 2006 .

Analysis and modeling of substrate impedance network in RF CMOS

D. Gloria, M. Minondo, G. Dambrine, 2006, 2006 IEEE International Conference on Microelectronic Test Structures.

Integrated RF-MEMS switch based on a combination of thermal and electrostatic actuation

C. Billard, S. Boret, P. Ancey, 2003, TRANSDUCERS '03. 12th International Conference on Solid-State Sensors, Actuators and Microsystems. Digest of Technical Papers (Cat. No.03TH8664).

94-GHz MMIC CPW low-noise amplifier on InP

Gilles Dambrine, Alain Cappy, S. Boret, 1999, Optics East.

1.8 dB insertion loss 200 GHz CPW band pass filter integrated in HR SOI CMOS Technology

F. Gianesello, D. Gloria, G. Dambrine, 2007, 2007 IEEE/MTT-S International Microwave Symposium.

Evaluation of sub-32nm CMOS technology for Millimeter wave applications

F. Gianesello, D. Gloria, S. Boret, 2010, The 40th European Microwave Conference.

Integration of multi-standard front end modules SOCs on high resistivity SOI RF CMOS technology

F. Gianesello, D. Gloria, C. Raynaud, 2010, 2010 IEEE Radio Frequency Integrated Circuits Symposium.

Hot carrier impact on the small signal equivalent circuit

G. Ghibaudo, D. Gloria, D. Roy, 2010, 2010 IEEE International Integrated Reliability Workshop Final Report.

Advanced 45nm MOSFET small-signal equivalent circuit aging under DC and RF hot carrier stress

G. Ghibaudo, D. Gloria, D. Roy, 2011, 2011 International Reliability Physics Symposium.

30-100-GHz inductors and transformers for millimeter-wave (Bi)CMOS integrated circuits

S.P. Voinigescu, R. Beerkens, D. Gloria, 2005, IEEE Transactions on Microwave Theory and Techniques.

MMW lab In-Situ to extract noise parameters of 65nm CMOS aiming 70∼90GHz applications

D. Gloria, G. Dambrine, Y. Tagro, 2009, 2009 IEEE Radio Frequency Integrated Circuits Symposium.

Is SOI CMOS A Promising Technology For SOCs In High Frequency Range

Romain Gwoziecki, Alain Chantre, Daniel Gloria, 2005 .

Characterization and Model Parameter Extraction of Symmetrical Centre Tapped Inductor using Build in Mixed Mode and Pure Differential S-Parameters

F. Gianesello, D. Gloria, S. Boret, 2009, 2009 IEEE International Conference on Microelectronic Test Structures.

5 GHz 1.4 dB NF CMOS LNA integrated in 130 nm High Resistivity SOI technology

F. Gianesello, D. Gloria, C. Raynaud, 2007, 2007 International Symposium on Integrated Circuits.

5GHz1.4dBNFCMOS LNAintegrated in130nmHighResistivity SOItechnology

Daniel Gloria, Frederic Gianesello, C. Raynaud, 2007 .

In-situ silicon integrated tuner for automated on-wafer MMW noise parameters extraction of Si HBT and MOSFET in the range 60–110GHz

D. Gloria, G. Dambrine, Y. Tagro, 2008, 2008 72nd ARFTG Microwave Measurement Symposium.

65 nm HR SOI CMOS Technology: emergence of Millimeter-Wave SoC

F. Gianesello, D. Gloria, G. Dambrine, 2007, 2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium.

90nm SOI-CMOS of 150GHz f/sub max/ and 0.8dB NF/sub min/ @6GHz for SOC

O. Rozeau, R. Gwoziecki, C. Raynaud, 2002, 2002 IEEE International SOI Conference.

Integrated Inductors in HR SOI CMOS technologies: on the economic advantage of SOI technologies for the integration of RF applications

F. Gianesello, D. Gloria, C. Raynaud, 2007, 2007 IEEE International SOI Conference.

65nm LP/GP mix low cost platform for multi-media wireless and consumer applications

P. Abramowitz, M. Woo, N. Planes, 2005, Proceedings of 35th European Solid-State Device Research Conference, 2005. ESSDERC 2005..

Integration of ultra wide band high pass filter using high performance inductors in advanced high resistivity SOI CMOS technology

Ph. Benech, P. Vincent, F. Gianesello, 2006, Digest of Papers. 2006 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems.

SiGe HBT noise parameters extraction using in-situ silicon integrated tuner in MMW range 60–110GHz

D. Gloria, G. Dambrine, Y. Tagro, 2009, 2009 IEEE Bipolar/BiCMOS Circuits and Technology Meeting.

0.13μm SiGe BiCMOS technology for mm-wave applications

P. Chevalier, L. Depoyan, D. Dutartre, 2008, 2008 IEEE Bipolar/BiCMOS Circuits and Technology Meeting.

Impact of layout and process on RF and analog performances of 3D damascene MIM capacitors

N. Segura, S. Cremer, S. Bruyere, 2007, 2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting.

94-GHz low noise amplifier on InP in coplanar technology

Henri Happy, Alain Cappy, S. Boret, 1999 .

65 nm RFCMOS technologies with bulk and HR SOI substrate for millimeter wave passives and circuits characterized up to 220 GHZ

F. Gianesello, D. Gloria, P. Benech, 2006, 2006 IEEE MTT-S International Microwave Symposium Digest.

Transmission Lines on Low Resistivity Silicon Substrate for MMICs Applications

D. Gloria, G. Dambrine, S. Boret, 2001, 2001 31st European Microwave Conference.

An above-IC RF-MEMS switch

D. Belot, M. Laurens, C. Billard, 2003, 2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC..

On the Design of High Performance RF Integrated Inductors on High Resistively Thin Film 65 nm SOI CMOS Technology

F. Gianesello, D. Gloria, C. Raynaud, 2008, 2008 IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems.