Rozalia Beica

Enabling information age through advanced packaging technologies and electronic materials

Rozalia Beica, 2018, 2018 Pan Pacific Microelectronics Symposium (Pan Pacific).

Development of thick negative photoresists for electroplating applications

Stephen Meyer, Edward Ng, Chunwei Chen, 2008, SPIE Advanced Lithography.

Through Silicon Via Technology: Cost effective Cu-TSV Interconnects by EMC3D and Technical Challenges with Cu-TSV

Rozalia Beica, Erik Young, Bioh Kim, 2010 .

Chip-First Fan-Out Panel-Level Packaging for Heterogeneous Integration

John H. Lau, Ming Li, Cao Xi, 2018, IEEE Transactions on Components, Packaging and Manufacturing Technology.

Fan-Out Wafer-Level Packaging (FOWLP) of Large Chip with Multiple Redistribution-Layers (RDLs)

John H. Lau, Ming Li, Cao Xi, 2017 .

2.5D Interposers and Advanced Organic Substrates Landscape: Technology and Market Trends

A. Ivankovic, Amandine Pizzagalli, Rozalia Beica, 2015 .