Joydeep Mitra

TSV stress-aware full-chip mechanical reliability analysis and optimization for 3D IC

S. Lim, Moongon Jung, D. Pan, 2014, CACM.

RADAR: RET-aware detailed routing using fast lithography simulations

David Z. Pan, Joydeep Mitra, Peng Yu, 2005, Proceedings. 42nd Design Automation Conference, 2005..

Manufacturability-Aware Routing

David Z. Pan, Joydeep Mitra, Minsik Cho, 2008, Handbook of Algorithms for Physical Design Automation.

Process, design rule, and layout co-optimization for DSA based patterning of sub-10nm Finfet devices

David Z. Pan, Joydeep Mitra, Andres Torres, 2017, Advanced Lithography.

Overview and development of EDA tools for integration of DSA into patterning solutions

J. Andres Torres, Joydeep Mitra, Yuri Granik, 2017, 2017 18th International Symposium on Quality Electronic Design (ISQED).

A fast simulation framework for full-chip thermo-mechanical stress and reliability analysis of through-silicon-via based 3D ICs

David Z. Pan, Moongon Jung, Suk-Kyu Ryu, 2011, 2011 IEEE 61st Electronic Components and Technology Conference (ECTC).

TSV Stress-Aware Full-Chip Mechanical Reliability Analysis and Optimization for 3-D IC

Sung Kyu Lim, David Z. Pan, Moongon Jung, 2011, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

SRAF Insertion via Supervised Dictionary Learning

Joydeep Mitra, Yuzhe Ma, Haoyu Yang, 2019, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Design for manufacturability and reliability for TSV-based 3D ICs

Jae-Seok Yang, Jiwoo Pak, Sung Kyu Lim, 2012, 17th Asia and South Pacific Design Automation Conference.