Douglas A. Edwards

Test pattern generation and partial-scan methodology for an asynchronous SoC interconnect

Aristides Efthymiou, John Bainbridge, Douglas A. Edwards, 2005, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Adding testability to an asynchronous interconnect for GALS SoC

Aristides Efthymiou, John Bainbridge, Douglas A. Edwards, 2004, 13th Asian Test Symposium.

Automatic scan insertion and pattern generation for asynchronous circuits

Aristides Efthymiou, Christos P. Sotiriou, Douglas A. Edwards, 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.