P. Ghosal

Network-on-chip routing using Structural Diametrical 2D mesh architecture

P. Ghosal, T. S. Das, 2012, 2012 Third International Conference on Emerging Applications of Information Technology.

Hexagonal minimum Steiner tree construction for Y architecture: A case of non-Manhattan routing

P. Ghosal, A. Biswas, P. Ghosal, 2012, 2012 Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics.

FL2STAR: A novel topology for on-chip routing in NoC with fault tolerance and deadlock prevention

P. Ghosal, T. S. Das, P. Ghosal, 2013, 2013 IEEE International Conference on Electronics, Computing and Communication Technologies.

Design of low power fault tolerant reversible multiplexer using QCA

P. Ghosal, B. Das, M. Maity, 2012, 2012 Third International Conference on Emerging Applications of Information Technology.

Partitioning in 3D ICs: A TSV aware strategy with area balancing

P. Ghosal, S. Chatterjee, P. Ghosal, 2012, 2012 International Conference on Devices, Circuits and Systems (ICDCS).

L2STAR: A Star Type level-2 2D Mesh architecture for NoC

P. Ghosal, T. S. Das, 2012, 2012 Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics.

Universal reversible logic gate design for low power computation at nano-scale

P. Ghosal, M. Maity, B. Das, 2012, 2012 Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics.