Nisa Bostanci

DR-STRaNGe: End-to-End System Design for DRAM-based True Random Number Generators

Jeremie S. Kim, O. Mutlu, Hasan Hassan, 2022, 2022 IEEE International Symposium on High-Performance Computer Architecture (HPCA).

QUAC-TRNG: High-Throughput True Random Number Generation Using Quadruple Row Activation in Commodity DRAM Chips

Onur Mutlu, Oguz Ergin, Abdullah Giray Yaglikçi, 2021, 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture (ISCA).

MetaSys: A Practical Open-source Metadata Management System to Implement and Evaluate Cross-layer Optimizations

Phillip B. Gibbons, Onur Mutlu University of Toronto, Technology, 2021, ACM Trans. Archit. Code Optim..

ETH 263-2210-00L Computer Architecture, Fall 2022 HW 1: Processing-in-memory (SOLUTIONS)

João Dinis Ferreira, Geraldo F. Oliveira, Nika Mansouri Ghiasi, 2022 .

DR-STRaNGe: End-to-End System Design for DRAM-based True Random Number Generators pdf

Onur Mutlu, Oguz Ergin, Abdullah Giray Yaglikçi, 2022, International Symposium on High-Performance Computer Architecture.

ABACuS: All-Bank Activation Counters for Scalable and Low Overhead RowHammer Mitigation

Geraldo F. Oliveira, Ismail Emir Yuksel, Yahya Can Tugrul, 2023, USENIX Security Symposium.

Victima: Drastically Increasing Address Translation Reach by Leveraging Underutilized Cache Resources

Konstantinos Kanellopoulos, O. Mutlu, Nisa Bostanci, 2023, 2023 56th IEEE/ACM International Symposium on Microarchitecture (MICRO).

Utopia: Fast and Efficient Address Translation via Hybrid Restrictive & Flexible Virtual-to-Physical Address Mappings

O. Mutlu, Rachata Ausavarungnirun, Nastaran Hajinazar, 2022, 2023 56th IEEE/ACM International Symposium on Microarchitecture (MICRO).