J.W.M. Rogers

A 1.2V CMOS multiplier for 10 Gbit/s equalization

C. Plett, J. Abbott, J.W.M. Rogers, 2005, Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005..

A completely integrated 1.9 GHz receiver front-end with monolithic image reject filter and VCO

C. Plett, J.W.M. Rogers, J.A. Macedo, 2000, 2000 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium Digest of Papers (Cat. No.00CH37096).

A 3.5mW Fully Integrated 1.8GHz Synthesizer in 0.13-μm CMOS

J.W.M. Rogers, V.I. Karam, 2006, 2006 IEEE North-East Workshop on Circuits and Systems.

A Fully Differential 24GHz Transmit PLL in a 0.13μm CMOS Technology

J.W.M. Rogers, Hao Shang, J. Chiu, 2006, 2006 IEEE North-East Workshop on Circuits and Systems.

A 5.8mW Fully Integrated 1.5GHz Synthesizer in 0.13-μm CMOS

J.W.M. Rogers, V.I. Karam, 2007, 2007 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems.

The effect of varactor nonlinearity on the phase noise of completely integrated VCOs

C. Plett, J.W.M. Rogers, J.A. Macedo, 2000, IEEE Journal of Solid-State Circuits.

A /spl Delta//spl Sigma/ fractional-N frequency synthesizer with a multi-band PMOS VCOs for 2.4 and 5GHz WLAN applications

J.W.M. Rogers, D. Rahn, M. Cavin, 2003, ESSCIRC 2004 - 29th European Solid-State Circuits Conference (IEEE Cat. No.03EX705).

A multiband /spl Delta//spl Sigma/ fractional-N frequency synthesizer for a MIMO WLAN transceiver RFIC

F.F. Dai, J.W.M. Rogers, M.S. Cavin, 2005, IEEE Journal of Solid-State Circuits.

A fully integrated multiband MIMO WLAN transceiver RFIC

J.W.M. Rogers, D. Moore, M.S. Cavin, 2005, IEEE Journal of Solid-State Circuits.

A completely integrated 1.8 volt 5 GHz tunable image reject notch filter

C. Plett, J.W.M. Rogers, 2001, 2001 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium (IEEE Cat. No.01CH37173).