Ramachandran Vaidyanathan

发表

Logarithmic-Time Complete Visibility for Robots with Lights

Gokarna Sharma, Ramachandran Vaidyanathan, Costas Busch, 2015, 2015 IEEE International Parallel and Distributed Processing Symposium.

Estimation of RFID Tag Population Size by Gaussian Estimator

Shuangqing Wei, Ramachandran Vaidyanathan, Md Mahmudul Hasan, 2017, 2018 IEEE International Conference on Communications (ICC).

On Fast Pattern Formation by Autonomous Robots

Gokarna Sharma, Ramachandran Vaidyanathan, Jerry L. Trahan, 2018, SSS.

Partition Information and its Transmission Over Boolean Multi-Access Channels

Shuangqing Wei, Ramachandran Vaidyanathan, Jian Yuan, 2014, IEEE Transactions on Information Theory.

Bus-Based Tree Structures for Efficient Parallel Computation

Si-Qing Zheng, Ramachandran Vaidyanathan, Omkar M. Dighe, 1993, 1993 International Conference on Parallel Processing - ICPP'93.

Transmission of partitioning information over non-adaptive multi-access Boolean channel

Shuangqing Wei, Ramachandran Vaidyanathan, Jian Yuan, 2014, 2014 48th Annual Conference on Information Sciences and Systems (CISS).

EduPar Introduction and Committees

Ramachandran Vaidyanathan, Sushil K. Prasad, Satish Puri, 2015, 2015 IEEE International Parallel and Distributed Processing Symposium Workshop.

An optimal multiple bus network for fan-in algorithms

Ramachandran Vaidyanathan, Hettihe P. Dharmasena, Ramachandran Vaidyanathan, 1997, Proceedings of the 1997 International Conference on Parallel Processing (Cat. No.97TB100162).

Constant Time Graph Algorithms on the Reconfigurable Mutliple Buss Machine

Ramachandran Vaidyanathan, Jerry L. Trahan, Chittur Subbaraman, 1997, J. Parallel Distributed Comput..

On the power of segmenting and fusing buses

Ramachandran Vaidyanathan, Jerry L. Trahan, Ratnapuri K. Thiruchelvan, 1993, [1993] Proceedings Seventh International Parallel Processing Symposium.

RAW Introduction

René Cumplido, Jürgen Becker, Marco D. Santambrogio, 2011, 2011 IEEE International Symposium on Parallel and Distributed Processing Workshops and Phd Forum.

On Running Windowed Image Computations on a Pipeline

Ramachandran Vaidyanathan, Phaneendra Vinukonda, 2012, 2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops & PhD Forum.

An Efficient Transformation for the Klee's Measure Problem in the Streaming Model

Gokarna Sharma, Ramachandran Vaidyanathan, Costas Busch, 2012, CCCG.

Towards optimal parallel radix sorting

Pramod K. Varshney, Ramachandran Vaidyanathan, Carlos R. P. Hartmann, 1993, [1993] Proceedings Seventh International Parallel Processing Symposium.

Efficient Totally-Ordered Subset Generation, with Application in Partial Reconfiguration

Ramachandran Vaidyanathan, Utsav Agarwal, 2017, 2017 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW).

Degree of scalability: scalable reconfigurable mesh algorithms for multiple addition and matrix-vector multiplication

Ramachandran Vaidyanathan, Jerry L. Trahan, Chun-ming Lu, 2003, Parallel Comput..

A potential-driven approach to constructing rectilinear Steiner trees

Si-Qing Zheng, Ramachandran Vaidyanathan, S. C. Gadre, 1993, [1993] Proceedings Third Great Lakes Symposium on VLSI-Design Automation of High Performance VLSI Systems.

Reconfigurable Implementation of Wavelet Integer Lifting Transforms for Image Compression

Ramachandran Vaidyanathan, Jerry L. Trahan, Suresh Rai, 2006, 2006 IEEE International Conference on Reconfigurable Computing and FPGA's (ReConFig 2006).

Lower bounds on the loading of multiple bus networks for binary tree algorithms

Ramachandran Vaidyanathan, Hettihe P. Dharmasena, R. Vaidyanathan, 2004, IEEE Transactions on Computers.

Detection of graph structures via communications over a multiaccess Boolean channel

Xiqin Wang, Shuangqing Wei, Ramachandran Vaidyanathan, 2015, 2015 IEEE International Symposium on Information Theory (ISIT).

Scaling multiple addition and prefix sums on the reconfigurable mesh

Ramachandran Vaidyanathan, Jerry L. Trahan, 2002, Inf. Process. Lett..

RAW Introduction and Committees

Wayne Luk, Jürgen Becker, Ken Eguro, 2015, 2016 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW).

O(log N)-Time Complete Visibility for Asynchronous Robots with Lights

Gokarna Sharma, Ramachandran Vaidyanathan, Costas Busch, 2017, 2017 IEEE International Parallel and Distributed Processing Symposium (IPDPS).

Integer and floating point matrix-vector multiplication on the reconfigurable mesh

Ramachandran Vaidyanathan, Jerry L. Trahan, Chun-ming Lu, 1996, Proceedings of International Conference on Parallel Processing.

Parallel integer sorting using small operations

Pramod K. Varshney, Ramachandran Vaidyanathan, Carlos R. P. Hartmann, 1995, Acta Informatica.

Achievable partition information rate over noisy multi-access Boolean channel

Shuangqing Wei, Ramachandran Vaidyanathan, Jian Yuan, 2014, 2014 IEEE International Symposium on Information Theory.

Constant Time Graph and Poset Algorithms on the Reconfigurable Multiple Bus Machine

Ramachandran Vaidyanathan, Jerry L. Trahan, Chittur Subbaraman, 1994, 1994 International Conference on Parallel Processing Vol. 3.

The Mesh With Binary Tree Networks: An Enhanced Mesh With Low Bus-Loading

Ramachandran Vaidyanathan, Hettihe P. Dharmasena, Ramachandran Vaidyanathan, 2004, J. Interconnect. Networks.

PRAMs with Variable Word-Size

Pramod K. Varshney, Ramachandran Vaidyanathan, Carlos R. P. Hartmann, 1992, Inf. Process. Lett..

Optimal Simulation of Multidimensional Reconfigurable Meshes by Two-Dimensional Reconfigurable Meshes

Ramachandran Vaidyanathan, Jerry L. Trahan, R. Vaidyanathan, 1993, Inf. Process. Lett..

MU-decoders: A class of fast and efficient configurable decoders

Ramachandran Vaidyanathan, Matthew Collin Jordan, 2010, 2010 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum (IPDPSW).

Sorting on PRAMs with Reconfigurable Buses

Ramachandran Vaidyanathan, 1992, Inf. Process. Lett..

Running ASCEND, DESCEND and PIPELINE Algorithms in Parallel Using Small Processors

Pramod K. Varshney, Ramachandran Vaidyanathan, Carlos R. P. Hartmann, 1993, Inf. Process. Lett..

Adaptive image filtering using run-time reconfiguration

Ramachandran Vaidyanathan, Jerry L. Trahan, Suresh Rai, 2003, Proceedings International Parallel and Distributed Processing Symposium.

Optimally Scaling Permutation Routing on Reconfigurable Linear Arrays with Optical Buses

Yi Pan, Ramachandran Vaidyanathan, Jerry L. Trahan, 2000, J. Parallel Distributed Comput..

Lower bounds on the loading of degree-2 multiple bus networks for binary-tree algorithms

Ramachandran Vaidyanathan, Hettihe P. Dharmasena, 1999, Proceedings 13th International Parallel Processing Symposium and 10th Symposium on Parallel and Distributed Processing. IPPS/SPDP 1999.

Work-Efficient Load Balancing

Gokarna Sharma, Ramachandran Vaidyanathan, Costas Busch, 2014, 2014 43rd International Conference on Parallel Processing Workshops.

List Ranking and Graph Algorithms on the Reconfigurable Multiple Bus Machine

Ramachandran Vaidyanathan, Jerry L. Trahan, Chittur Subbaraman, 1993, 1993 International Conference on Parallel Processing - ICPP'93.

On mapping multidimensional weak tori on optical slab waveguides

Ramachandran Vaidyanathan, Karthik Sethuraman, 2005, 2005 International Conference on Parallel Processing (ICPP'05).

Configuring the circuit switched tree for multiple width communications

Ramachandran Vaidyanathan, Jerry L. Trahan, Krishnendu Roy, 2005, 19th IEEE International Parallel and Distributed Processing Symposium.

Efficient transformations for Klee's measure problem in the streaming model

Gokarna Sharma, Ramachandran Vaidyanathan, Costas Busch, 2015, Comput. Geom..

Dynamic reconfiguration - architectures and algorithms

Ramachandran Vaidyanathan, Jerry L. Trahan, 2003, Series in computer science.

The Bus-Connected Ringed Tree: A Versatile Interconnection Network

Si-Qing Zheng, Ramachandran Vaidyanathan, Omkar M. Dighe, 1996, J. Parallel Distributed Comput..

Exact Bounds on Running ASCEND/DESCEND and FAN-IN Algorithms on Synchronous Multiple Bus Networks

Ramachandran Vaidyanathan, Arshad Ali, 1996, IEEE Trans. Parallel Distributed Syst..

An Architecture for Configuring an Effcient Scan Path for a Subset of Elements

Ramachandran Vaidyanathan, Arash Ashrafi, R. Vaidyanathan, 2015, 2015 IEEE International Parallel and Distributed Processing Symposium Workshop.

Guest Editorial RAW 2014

Marco D. Santambrogio, Ramachandran Vaidyanathan, 2016, ACM Trans. Reconfigurable Technol. Syst..

Dynamic Reconfiguration on the R-Mesh

Ramachandran Vaidyanathan, Jerry L. Trahan, 2007, Handbook of Parallel Computing.

Introduction to RAW Workshop

Marco D. Santambrogio, Ramachandran Vaidyanathan, 2017, IPDPS Workshops.

A Scalable and Efficient Algorithm for Computing the City Block Distance Transform on Reconfigurable Meshes

Yi Pan, Ramachandran Vaidyanathan, Jerry L. Trahan, 1997, Comput. J..

Brief Announcement: Asynchronous, Distributed, Optical Mutual Exclusion

Shuangqing Wei, Ramachandran Vaidyanathan, Ahmed B. Mansour, 2017, SSS.

Fault Tolerance in Multiple Bus Networks with Unbalanced Resource Utilization

Ramachandran Vaidyanathan, Hettihe P. Dharmasena, 2003, PDPTA.

Optimally scaling permutation routing on reconfigurable linear arrays with optical buses

Yi Pan, Ramachandran Vaidyanathan, Jerry L. Trahan, 1999, Proceedings 13th International Parallel Processing Symposium and 10th Symposium on Parallel and Distributed Processing. IPPS/SPDP 1999.

On the Power of Segmenting and Fusing Buses

Ramachandran Vaidyanathan, Jerry L. Trahan, Ratnapuri K. Thiruchelvan, 1996, J. Parallel Distributed Comput..

Pipelined Execution of Windowed Image Computations

Ramachandran Vaidyanathan, Phaneendra Vinukonda, Alyssa C. Lessing, 2013, Int. J. Netw. Comput..

Constant-Time Complete Visibility for Asynchronous Robots with Lights

Gokarna Sharma, Ramachandran Vaidyanathan, Jerry L. Trahan, 2017, SSS.

Complete Visibility for Robots with Lights in O(1) Time

Gokarna Sharma, Ramachandran Vaidyanathan, Costas Busch, 2016, SSS.

Configurable decoders with application in fast partial reconfiguration of FPGAs

Ramachandran Vaidyanathan, Matthew Collin Jordan, 2008, FPGA '08.

VSI: Edu*-2016 - Keeping up with technology: Teaching parallel, distributed and high-performance computing

Christos Kaklamanis, Sheikh Ghafoor, Ramachandran Vaidyanathan, 2018, J. Parallel Distributed Comput..