Sakshi Bajaj

FPGA Implementation of Booth Encoded Multi-Modulus {2n -1, 2n , 2n +1} RNS Multiplier

Amanpreet Kaur, Saguna Goel, Sakshi Bajaj, 2016 .

Design and analysis of bypassing multipier

Sakshi Bajaj, M. Ahuja, 2013, ARTCom 2013.

Energy efficient memristor based non volatile memory cell design

Sanjay Sharma, Sakshi Bajaj, Kavita Bhagnani, 2016 .

FPGA implementation of radix-10 parallel decimal multiplier

Geeta, Sakshi Bajaj, 2015 .